DarwinDumper

DarwinDumper Report

Version: 2.4.9
Development location: http://www.projectosx.com
Date: Wed Nov 13 14:48:04 EST 2013

Mac Model: MacPro3,1
CPU: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz
Graphics: GeForce GTX 560 Ti

Operating System
Mountain Lion
Build: 12F45

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ACPI Tables

APIC

View File APIC.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20120320-32 [Sep 3 2012]

* Disassembly of /tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/APIC.aml, Wed Nov 13 14:47:37 2013

* ACPI Data Table [APIC]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table]

[004h 0004 4] Table Length : 00000092

[008h 0008 1] Revision : 03

[009h 0009 1] Checksum : D2

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I"

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 4] Local Apic Address : FEE00000

[028h 0040 4] Flags (decoded below) : 00000001

PC-AT Compatibility : 1

[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]

[02Dh 0045 1] Length : 08

[02Eh 0046 1] Processor ID : 01

[02Fh 0047 1] Local Apic ID : 00

[030h 0048 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[034h 0052 1] Subtable Type : 00 [Processor Local APIC]

[035h 0053 1] Length : 08

[036h 0054 1] Processor ID : 02

[037h 0055 1] Local Apic ID : 02

[038h 0056 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[03Ch 0060 1] Subtable Type : 00 [Processor Local APIC]

[03Dh 0061 1] Length : 08

[03Eh 0062 1] Processor ID : 03

[03Fh 0063 1] Local Apic ID : 04

[040h 0064 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[044h 0068 1] Subtable Type : 00 [Processor Local APIC]

[045h 0069 1] Length : 08

[046h 0070 1] Processor ID : 04

[047h 0071 1] Local Apic ID : 06

[048h 0072 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[04Ch 0076 1] Subtable Type : 00 [Processor Local APIC]

[04Dh 0077 1] Length : 08

[04Eh 0078 1] Processor ID : 05

[04Fh 0079 1] Local Apic ID : 01

[050h 0080 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[054h 0084 1] Subtable Type : 00 [Processor Local APIC]

[055h 0085 1] Length : 08

[056h 0086 1] Processor ID : 06

[057h 0087 1] Local Apic ID : 03

[058h 0088 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[05Ch 0092 1] Subtable Type : 00 [Processor Local APIC]

[05Dh 0093 1] Length : 08

[05Eh 0094 1] Processor ID : 07

[05Fh 0095 1] Local Apic ID : 05

[060h 0096 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[064h 0100 1] Subtable Type : 00 [Processor Local APIC]

[065h 0101 1] Length : 08

[066h 0102 1] Processor ID : 08

[067h 0103 1] Local Apic ID : 07

[068h 0104 4] Flags (decoded below) : 00000001

Processor Enabled : 1

[06Ch 0108 1] Subtable Type : 01 [I/O APIC]

[06Dh 0109 1] Length : 0C

[06Eh 0110 1] I/O Apic ID : 02

[06Fh 0111 1] Reserved : 00

[070h 0112 4] Address : FEC00000

[074h 0116 4] Interrupt : 00000000

[078h 0120 1] Subtable Type : 02 [Interrupt Source Override]

[079h 0121 1] Length : 0A

[07Ah 0122 1] Bus : 00

[07Bh 0123 1] Source : 00

[07Ch 0124 4] Interrupt : 00000002

[080h 0128 2] Flags (decoded below) : 0000

Polarity : 0

Trigger Mode : 0

[082h 0130 1] Subtable Type : 02 [Interrupt Source Override]

[083h 0131 1] Length : 0A

[084h 0132 1] Bus : 00

[085h 0133 1] Source : 09

[086h 0134 4] Interrupt : 00000009

[08Ah 0138 2] Flags (decoded below) : 000D

Polarity : 1

Trigger Mode : 3

[08Ch 0140 1] Subtable Type : 04 [Local APIC NMI]

[08Dh 0141 1] Length : 06

[08Eh 0142 1] Processor ID : FF

[08Fh 0143 2] Flags (decoded below) : 0005

Polarity : 1

Trigger Mode : 1

[091h 0145 1] Interrupt Input LINT : 01

Raw Table Data: Length 146 (0x92)

0000: 41 50 49 43 92 00 00 00 03 D2 41 4C 41 53 4B 41 APIC......ALASKA

0010: 41 20 4D 20 49 00 00 00 09 20 07 01 41 4D 49 20 A M I.... ..AMI

0020: 13 00 01 00 00 00 E0 FE 01 00 00 00 00 08 01 00 ................

0030: 01 00 00 00 00 08 02 02 01 00 00 00 00 08 03 04 ................

0040: 01 00 00 00 00 08 04 06 01 00 00 00 00 08 05 01 ................

0050: 01 00 00 00 00 08 06 03 01 00 00 00 00 08 07 05 ................

0060: 01 00 00 00 00 08 08 07 01 00 00 00 01 0C 02 00 ................

0070: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 ................

0080: 00 00 02 0A 00 09 09 00 00 00 0D 00 04 06 FF 05 ................

0090: 00 01 ..

APIC
DSDT
FACP
FACS
HPET
MCFG
RSDT
SSDT-1
SSDT-2
SSDT

DSDT

View File DSDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20120320-32 [Sep 3 2012]

* Disassembly of /tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/DSDT.aml, Wed Nov 13 14:47:37 2013

* Original Table Header:

* Signature "DSDT"

* Length 0x000070C8 (28872)

* Revision 0x02

* Checksum 0x98

* OEM ID "ALASKA"

* OEM Table ID "A M I"

* OEM Revision 0x00000012 (18)

* Compiler ID "INTL"

* Compiler Version 0x20130927 (538118439)

DefinitionBlock ("/tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/DSDT.aml", "DSDT", 2, "ALASKA", "A M I", 0x00000012)

{

External (PDC7)

External (PDC6)

External (PDC5)

External (PDC4)

External (PDC3)

External (PDC2)

External (PDC1)

External (PDC0)

External (HNOT, MethodObj) // 1 Arguments

External (SNXD)

External (IDAB)

External (HDOS, MethodObj) // 0 Arguments

Name (SP1O, 0x2E)

Name (GPIB, 0x0A00)

Name (GPIL, 0x10)

Name (PMEB, 0x0A20)

Name (PMEL, 0x10)

Name (HWMB, 0x0A30)

Name (HWML, 0x10)

Name (IOES, Zero)

Name (SMBS, 0x0580)

Name (SMBL, 0x20)

Name (PMBS, 0x0400)

Name (PMLN, 0x80)

Name (GPBS, 0x0500)

Name (GPLN, 0x80)

Name (SMIP, 0xB2)

Name (APCB, 0xFEC00000)

Name (APCL, 0x1000)

Name (SMCR, 0x0430)

Name (HPTB, 0xFED00000)

Name (HPTC, 0xFED1F404)

Name (FLSZ, 0x00600000)

Name (SRCB, 0xFED1C000)

Name (RCLN, 0x4000)

Name (TCBR, 0xFED08000)

Name (TCLT, 0x1000)

Name (PEBS, 0xF0000000)

Name (PELN, 0x08000000)

Name (LAPB, 0xFEE00000)

Name (EGPB, 0xFED19000)

Name (EGPL, 0x1000)

Name (MCHB, 0xFED10000)

Name (MCHL, 0x4000)

Name (DMIB, 0xFED18000)

Name (DMIL, 0x1000)

Name (IFPB, 0xFED14000)

Name (IFPL, 0x1000)

Name (TTTB, 0xFED20000)

Name (TTTL, 0x00020000)

Name (VTBS, 0xFED90000)

Name (VTLN, 0x4000)

Name (PBLK, 0x0410)

Name (LVL2, 0x0414)

Name (LVL3, 0x0415)

Name (LVL4, 0x0416)

Name (PM30, 0x0430)

Name (SUSW, 0xFF)

Name (ACPH, 0xDE)

Name (ASSB, Zero)

Name (AOTB, Zero)

Name (AAXB, Zero)

Name (PEHP, One)

Name (SHPC, One)

Name (PEPM, One)

Name (PEER, One)

Name (PECS, One)

Name (ITKE, Zero)

Name (MBEC, 0xFFFF)

Name (DSSP, Zero)

Name (FHPP, One)

Name (FMBL, One)

Name (FDTP, 0x02)

Name (FUPS, 0x03)

Name (FUWS, 0x04)

Name (BSH, Zero)

Name (BEL, One)

Name (BEH, 0x02)

Name (BRH, 0x03)

Name (BTF, 0x04)

Name (BHC, 0x05)

Name (BYB, 0x06)

Name (BPH, 0x07)

Name (BSHS, 0x08)

Name (BELC, 0x09)

Name (BRHP, 0x0A)

Name (BTFC, 0x0B)

Name (BEHP, 0x0C)

Name (BPHS, 0x0D)

Name (BELP, 0x0E)

Name (BTL, 0x10)

Name (BTFP, 0x11)

Name (BSR, 0x14)

Name (BOF, 0x20)

Name (BEF, 0x21)

Name (BLLE, 0x22)

Name (BLLC, 0x23)

Name (BLCA, 0x24)

Name (BLLS, 0x25)

Name (BLLP, 0x26)

Name (BLLD, 0x27)

Name (BHBE, 0x30)

Name (BHBC, 0x31)

Name (BHBN, 0x32)

Name (BHBM, 0x33)

Name (TCGM, One)

Name (TRTP, One)

Name (WDTE, One)

Name (TRTD, 0x02)

Name (TRTI, 0x03)

Name (GCDD, One)

Name (DSTA, 0x0A)

Name (DSLO, 0x0C)

Name (DSLC, 0x0E)

Name (PITS, 0x10)

Name (SBCS, 0x12)

Name (SALS, 0x13)

Name (LSSS, 0x2A)

Name (SOOT, 0x35)

Name (PDBR, 0x4D)

Name (TBSW, 0xBC)

Name (SMIT, 0xB2)

Name (OFST, 0x35)

Name (TPMF, Zero)

Name (TCMF, Zero)

Name (TMF1, Zero)

Name (TMF2, Zero)

Name (TMF3, Zero)

Name (TRST, 0x02)

Name (SS1, Zero)

Name (SS2, Zero)

Name (SS3, One)

Name (SS4, One)

Name (IOST, 0x0000)

Name (TOPM, 0x00000000)

Name (ROMS, 0xFFE00000)

Name (VGAF, One)

Name (WOWE, Zero)

Name (TAPD, Zero)

Name (KBFG, One)

Name (MSFG, One)

OperationRegion (GNVS, SystemMemory, 0x5DBCFE18, 0x01CD)

Field (GNVS, AnyAcc, Lock, Preserve)

{

OSYS, 16,

SMIF, 8,

PRM0, 8,

PRM1, 8,

SCIF, 8,

PRM2, 8,

PRM3, 8,

LCKF, 8,

PRM4, 8,

PRM5, 8,

P80D, 32,

LIDS, 8,

PWRS, 8,

DBGS, 8,

THOF, 8,

ACT1, 8,

ACTT, 8,

PSVT, 8,

TC1V, 8,

TC2V, 8,

TSPV, 8,

CRTT, 8,

DTSE, 8,

DTS1, 8,

DTS2, 8,

DTSF, 8,

Offset (0x25),

REVN, 8,

RES3, 8,

Offset (0x28),

APIC, 8,

TCNT, 8,

PCP0, 8,

PCP1, 8,

PPCM, 8,

PPMF, 32,

C67L, 8,

NATP, 8,

CMAP, 8,

CMBP, 8,

LPTP, 8,

FDCP, 8,

CMCP, 8,

CIRP, 8,

SMSC, 8,

W381, 8,

SMC1, 8,

IGDS, 8,

TLST, 8,

CADL, 8,

PADL, 8,

CSTE, 16,

NSTE, 16,

SSTE, 16,

NDID, 8,

DID1, 32,

DID2, 32,

DID3, 32,

DID4, 32,

DID5, 32,

KSV0, 32,

KSV1, 8,

Offset (0x67),

BLCS, 8,

BRTL, 8,

ALSE, 8,

ALAF, 8,

LLOW, 8,

LHIH, 8,

Offset (0x6E),

EMAE, 8,

EMAP, 16,

EMAL, 16,

Offset (0x74),

MEFE, 8,

DSTS, 8,

Offset (0x78),

TPMP, 8,

TPME, 8,

MORD, 8,

TCGP, 8,

PPRP, 32,

PPRQ, 8,

LPPR, 8,

GTF0, 56,

GTF2, 56,

IDEM, 8,

GTF1, 56,

BID, 8,

PLID, 8,

Offset (0xAA),

ASLB, 32,

IBTT, 8,

IPAT, 8,

ITVF, 8,

ITVM, 8,

IPSC, 8,

IBLC, 8,

IBIA, 8,

ISSC, 8,

I409, 8,

I509, 8,

I609, 8,

I709, 8,

IPCF, 8,

IDMS, 8,

IF1E, 8,

HVCO, 8,

NXD1, 32,

NXD2, 32,

NXD3, 32,

NXD4, 32,

NXD5, 32,

NXD6, 32,

NXD7, 32,

NXD8, 32,

GSMI, 8,

PAVP, 8,

Offset (0xE1),

OSCC, 8,

NEXP, 8,

SBV1, 8,

SBV2, 8,

Offset (0xEB),

DSEN, 8,

ECON, 8,

GPIC, 8,

CTYP, 8,

L01C, 8,

VFN0, 8,

VFN1, 8,

VFN2, 8,

VFN3, 8,

VFN4, 8,

Offset (0x100),

NVGA, 32,

NVHA, 32,

AMDA, 32,

DID6, 32,

DID7, 32,

DID8, 32,

EBAS, 32,

CPSP, 32,

EECP, 32,

EVCP, 32,

XBAS, 32,

OBS1, 32,

OBS2, 32,

OBS3, 32,

OBS4, 32,

OBS5, 32,

OBS6, 32,

OBS7, 32,

OBS8, 32,

Offset (0x157),

ATMC, 8,

PTMC, 8,

ATRA, 8,

PTRA, 8,

PNHM, 32,

TBAB, 32,

TBAH, 32,

RTIP, 8,

TSOD, 8,

ATPC, 8,

PTPC, 8,

PFLV, 8,

BREV, 8,

SGMD, 8,

SGFL, 8,

PWOK, 8,

HLRS, 8,

DSEL, 8,

ESEL, 8,

PSEL, 8,

PWEN, 8,

PRST, 8,

MXD1, 32,

MXD2, 32,

MXD3, 32,

MXD4, 32,

MXD5, 32,

MXD6, 32,

MXD7, 32,

MXD8, 32,

GBAS, 16,

SGGP, 8,

PXFX, 8,

PXDY, 8,

PXFD, 8,

Offset (0x19D),

ALFP, 8,

IMON, 8,

PDTS, 8,

PKGA, 8,

PAMT, 8,

AC0F, 8,

AC1F, 8,

DTS3, 8,

DTS4, 8,

Offset (0x1B2),

XHCR, 8,

XHPM, 8,

Offset (0x1B7),

XTUB, 32,

XTUS, 32,

XMPB, 32,

Offset (0x1C4),

LPMV, 8,

Offset (0x1C6),

DDRF, 8,

MM64, 8,

AOAC, 8,

SLDR, 32

}

OperationRegion (SMIE, SystemIO, PMBS, 0x04)

Field (SMIE, ByteAcc, NoLock, Preserve)

{

, 10,

RTCS, 1,

, 3,

PEXS, 1,

WAKS, 1,

Offset (0x03),

PWBT, 1,

Offset (0x04)

}

OperationRegion (SLPR, SystemIO, SMCR, 0x08)

Field (SLPR, ByteAcc, NoLock, Preserve)

{

, 4,

SLPE, 1,

, 31,

SLPX, 1,

Offset (0x08)

}

OperationRegion (LED, SystemIO, 0x0500, 0x20)

Field (LED, ByteAcc, NoLock, Preserve)

{

, 28,

LEDU, 1,

Offset (0x04),

, 28,

LEDD, 1,

Offset (0x08),

Offset (0x0C),

, 28,

LEDV, 1,

Offset (0x10),

Offset (0x14),

Offset (0x18),

, 28,

LEDB, 1,

Offset (0x1C),

Offset (0x20)

}

Scope (_SB)

{

Name (PR00, Package (0x23)

{

Package (0x04)

{

0x001FFFFF,

Zero,

LNKF,

Zero

Package (0x04)

{

0x001FFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0x001FFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001FFFFF,

0x03,

LNKA,

Zero

Package (0x04)

{

0x0014FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001DFFFF,

Zero,

LNKH,

Zero

Package (0x04)

{

0x001DFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0x001DFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0x001DFFFF,

0x03,

LNKC,

Zero

Package (0x04)

{

0x001AFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001AFFFF,

One,

LNKF,

Zero

Package (0x04)

{

0x001AFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001AFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x001BFFFF,

Zero,

LNKG,

Zero

Package (0x04)

{

0x0016FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0016FFFF,

One,

LNKD,

Zero

Package (0x04)

{

0x0016FFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x0016FFFF,

0x03,

LNKB,

Zero

Package (0x04)

{

0x001CFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x001CFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x001CFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x001CFFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0001FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0001FFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x0001FFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x0001FFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0006FFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0x0006FFFF,

One,

LNKA,

Zero

Package (0x04)

{

0x0006FFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0x0006FFFF,

0x03,

LNKC,

Zero

Package (0x04)

{

0x0004FFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0x0004FFFF,

One,

LNKB,

Zero

Package (0x04)

{

0x0004FFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0x0004FFFF,

0x03,

LNKD,

Zero

Package (0x04)

{

0x0002FFFF,

Zero,

LNKA,

Zero

}

})

Name (AR00, Package (0x23)

{

Package (0x04)

{

0x001FFFFF,

Zero,

0x15

Package (0x04)

{

0x001FFFFF,

One,

Zero,

0x13

Package (0x04)

{

0x001FFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x001FFFFF,

0x03,

Zero,

0x10

Package (0x04)

{

0x0014FFFF,

Zero,

0x10

Package (0x04)

{

0x001DFFFF,

Zero,

0x17

Package (0x04)

{

0x001DFFFF,

One,

Zero,

0x13

Package (0x04)

{

0x001DFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0x001DFFFF,

0x03,

Zero,

0x12

Package (0x04)

{

0x001AFFFF,

Zero,

0x10

Package (0x04)

{

0x001AFFFF,

One,

Zero,

0x15

Package (0x04)

{

0x001AFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x001AFFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x001BFFFF,

Zero,

0x16

Package (0x04)

{

0x0016FFFF,

Zero,

0x10

Package (0x04)

{

0x0016FFFF,

One,

Zero,

0x13

Package (0x04)

{

0x0016FFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x0016FFFF,

0x03,

Zero,

0x11

Package (0x04)

{

0x001CFFFF,

Zero,

0x10

Package (0x04)

{

0x001CFFFF,

One,

Zero,

0x11

Package (0x04)

{

0x001CFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x001CFFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0001FFFF,

Zero,

0x10

Package (0x04)

{

0x0001FFFF,

One,

Zero,

0x11

Package (0x04)

{

0x0001FFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x0001FFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0006FFFF,

Zero,

0x13

Package (0x04)

{

0x0006FFFF,

One,

Zero,

0x10

Package (0x04)

{

0x0006FFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0x0006FFFF,

0x03,

Zero,

0x12

Package (0x04)

{

0x0004FFFF,

Zero,

0x10

Package (0x04)

{

0x0004FFFF,

One,

Zero,

0x11

Package (0x04)

{

0x0004FFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0x0004FFFF,

0x03,

Zero,

0x13

Package (0x04)

{

0x0002FFFF,

Zero,

0x10

}

})

Name (PR04, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR04, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR08, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR08, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR09, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR09, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PR0E, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKB,

Zero

}

})

Name (AR0E, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x12

Package (0x04)

{

0xFFFF,

One,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x11

}

})

Name (PR0F, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKC,

Zero

}

})

Name (AR0F, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x13

Package (0x04)

{

0xFFFF,

One,

Zero,

0x10

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x12

}

})

Name (PR02, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKA,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKD,

Zero

}

})

Name (AR02, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x10

Package (0x04)

{

0xFFFF,

One,

Zero,

0x11

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x13

}

})

Name (PR0A, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

LNKB,

Zero

Package (0x04)

{

0xFFFF,

One,

LNKC,

Zero

Package (0x04)

{

0xFFFF,

0x02,

LNKD,

Zero

Package (0x04)

{

0xFFFF,

0x03,

LNKA,

Zero

}

})

Name (AR0A, Package (0x04)

{

Package (0x04)

{

0xFFFF,

Zero,

0x11

Package (0x04)

{

0xFFFF,

One,

Zero,

0x12

Package (0x04)

{

0xFFFF,

0x02,

Zero,

0x13

Package (0x04)

{

0xFFFF,

0x03,

Zero,

0x10

}

})

Name (PRSA, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{3,4,5,6,7,10,11,12,14,15}

})

Alias (PRSA, PRSB)

Alias (PRSA, PRSC)

Alias (PRSA, PRSD)

Alias (PRSA, PRSE)

Alias (PRSA, PRSF)

Alias (PRSA, PRSG)

Alias (PRSA, PRSH)

Device (PCI0)

{

Name (_HID, EisaId ("PNP0A08"))

Name (_CID, EisaId ("PNP0A03"))

Name (_ADR, Zero)

Method (^BN00, 0, NotSerialized)

{

Return (Zero)

}

Method (_BBN, 0, NotSerialized)

{

Return (BN00 ())

}

Name (_UID, Zero)

OperationRegion (HBUS, PCI_Config, Zero, 0x0100)

Field (HBUS, DWordAcc, NoLock, Preserve)

{

Offset (0x40),

EPEN, 1,

, 11,

EPBR, 20,

Offset (0x48),

MHEN, 1,

, 14,

MHBR, 17,

Offset (0x50),

GCLK, 1,

Offset (0x54),

D0EN, 1,

Offset (0x60),

PXEN, 1,

PXSZ, 2,

, 23,

PXBR, 6,

Offset (0x68),

DIEN, 1,

, 11,

DIBR, 20,

Offset (0x70),

, 20,

MEBR, 12,

Offset (0x80),

, 4,

PM0H, 2,

Offset (0x81),

PM1L, 2,

, 2,

PM1H, 2,

Offset (0x82),

PM2L, 2,

, 2,

PM2H, 2,

Offset (0x83),

PM3L, 2,

, 2,

PM3H, 2,

Offset (0x84),

PM4L, 2,

, 2,

PM4H, 2,

Offset (0x85),

PM5L, 2,

, 2,

PM5H, 2,

Offset (0x86),

PM6L, 2,

, 2,

PM6H, 2,

Offset (0x87),

Offset (0xA8),

, 20,

TUUD, 19,

Offset (0xBC),

, 20,

TLUD, 12,

Offset (0xC8),

, 7,

HTSE, 1

}

OperationRegion (MCHT, SystemMemory, 0xFED10000, 0x6000)

Field (MCHT, ByteAcc, NoLock, Preserve)

{

Offset (0x5994),

RPSL, 8,

Offset (0x5998),

RP0C, 8,

RP1C, 8,

RPNC, 8

}

Name (BUF0, ResourceTemplate ()

{

WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,

0x0000, // Granularity

0x0000, // Range Minimum

0x00FF, // Range Maximum

0x0000, // Translation Offset

0x0100, // Length

,, )

DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,

0x00000000, // Granularity

0x00000000, // Range Minimum

0x00000CF7, // Range Maximum

0x00000000, // Translation Offset

0x00000CF8, // Length

,, , TypeStatic)

IO (Decode16,

0x0CF8, // Range Minimum

0x0CF8, // Range Maximum

0x01, // Alignment

0x08, // Length

)

DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,

0x00000000, // Granularity

0x00000D00, // Range Minimum

0x0000FFFF, // Range Maximum

0x00000000, // Translation Offset

0x0000F300, // Length

,, , TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000A0000, // Range Minimum

0x000BFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00020000, // Length

,, , AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000C0000, // Range Minimum

0x000C3FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y00, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000C4000, // Range Minimum

0x000C7FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y01, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000C8000, // Range Minimum

0x000CBFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y02, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000CC000, // Range Minimum

0x000CFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y03, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000D0000, // Range Minimum

0x000D3FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y04, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000D4000, // Range Minimum

0x000D7FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y05, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000D8000, // Range Minimum

0x000DBFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y06, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000DC000, // Range Minimum

0x000DFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y07, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000E0000, // Range Minimum

0x000E3FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y08, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000E4000, // Range Minimum

0x000E7FFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y09, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000E8000, // Range Minimum

0x000EBFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y0A, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000EC000, // Range Minimum

0x000EFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00004000, // Length

,, _Y0B, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x000F0000, // Range Minimum

0x000FFFFF, // Range Maximum

0x00000000, // Translation Offset

0x00010000, // Length

,, _Y0C, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0x00000000, // Range Minimum

0xFEAFFFFF, // Range Maximum

0x00000000, // Translation Offset

0xFEB00000, // Length

,, _Y0D, AddressRangeMemory, TypeStatic)

DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,

0x00000000, // Granularity

0xFED40000, // Range Minimum

0xFED44FFF, // Range Maximum

0x00000000, // Translation Offset

0x00005000, // Length

,, , AddressRangeMemory, TypeStatic)

})

Method (_CRS, 0, Serialized)

{

If (PM1L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y00._LEN, C0LN)

Store (Zero, C0LN)

}

If (LEqual (PM1L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y00._RW, C0RW)

Store (Zero, C0RW)

}

If (PM1H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C4LN)

Store (Zero, C4LN)

}

If (LEqual (PM1H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C4RW)

Store (Zero, C4RW)

}

If (PM2L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C8LN)

Store (Zero, C8LN)

}

If (LEqual (PM2L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C8RW)

Store (Zero, C8RW)

}

If (PM2H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, CCLN)

Store (Zero, CCLN)

}

If (LEqual (PM2H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y03._RW, CCRW)

Store (Zero, CCRW)

}

If (PM3L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, D0LN)

Store (Zero, D0LN)

}

If (LEqual (PM3L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y04._RW, D0RW)

Store (Zero, D0RW)

}

If (PM3H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D4LN)

Store (Zero, D4LN)

}

If (LEqual (PM3H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D4RW)

Store (Zero, D4RW)

}

If (PM4L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D8LN)

Store (Zero, D8LN)

}

If (LEqual (PM4L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D8RW)

Store (Zero, D8RW)

}

If (PM4H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, DCLN)

Store (Zero, DCLN)

}

If (LEqual (PM4H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y07._RW, DCRW)

Store (Zero, DCRW)

}

If (PM5L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, E0LN)

Store (Zero, E0LN)

}

If (LEqual (PM5L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y08._RW, E0RW)

Store (Zero, E0RW)

}

If (PM5H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E4LN)

Store (Zero, E4LN)

}

If (LEqual (PM5H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E4RW)

Store (Zero, E4RW)

}

If (PM6L)

{

CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E8LN)

Store (Zero, E8LN)

}

If (LEqual (PM6L, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E8RW)

Store (Zero, E8RW)

}

If (PM6H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, ECLN)

Store (Zero, ECLN)

}

If (LEqual (PM6H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, ECRW)

Store (Zero, ECRW)

}

If (PM0H)

{

CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, F0LN)

Store (Zero, F0LN)

}

If (LEqual (PM0H, One))

{

CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, F0RW)

Store (Zero, F0RW)

}

CreateDWordField (BUF0, \_SB.PCI0._Y0D._MIN, M1MN)

CreateDWordField (BUF0, \_SB.PCI0._Y0D._MAX, M1MX)

CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, M1LN)

ShiftLeft (TLUD, 0x14, M1MN)

Add (Subtract (M1MX, M1MN), One, M1LN)

Return (BUF0)

}

Name (GUID, Buffer (0x10)

{

/* 0000 */ 0x5B, 0x4D, 0xDB, 0x33, 0xF7, 0x1F, 0x1C, 0x40,

/* 0008 */ 0x96, 0x57, 0x74, 0x41, 0xC0, 0x3D, 0xD7, 0x66

})

Name (SUPP, Zero)

Name (CTRL, Zero)

Method (_OSC, 4, Serialized)

{

Store (Arg3, Local0)

CreateDWordField (Local0, Zero, CDW1)

CreateDWordField (Local0, 0x04, CDW2)

CreateDWordField (Local0, 0x08, CDW3)

Store (CDW2, SUPP)

Store (CDW3, CTRL)

If (LEqual (One, OSDW ()))

{

If (LAnd (LEqual (Arg0, GUID), NEXP))

{

If (LNotEqual (Arg1, One))

{

Or (CDW1, 0x08, CDW1)

}

If (LNotEqual (CDW3, CTRL))

{

Or (CDW1, 0x10, CDW1)

}

Store (CTRL, CDW3)

Store (CTRL, OSCC)

Return (Local0)

}

Else

{

Or (CDW1, 0x04, CDW1)

Return (Local0)

}

Else

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xA9, 0x12, 0x95, 0x7C, 0x05, 0x17, 0xB4, 0x4C,

/* 0008 */ 0xAF, 0x7D, 0x50, 0x6A, 0x24, 0x23, 0xAB, 0x71

}))

{

Store (One, ^XHC1.PASS)

Store (One, ^XHC1.PAHC)

Store (One, ^XHC1.PBSS)

Store (One, ^XHC1.PBHC)

Store (One, GI60)

Store (One, ^XHC1.PCSS)

Store (One, ^XHC1.PCHC)

Store (One, ^XHC1.PDSS)

Store (One, ^XHC1.PDHC)

Store (One, GI74)

}

If (LEqual (Arg0, GUID))

{

If (LEqual (DTBP (), One))

{

And (CDW3, 0xFFFFFFFB, CDW3)

}

Return (Local0)

}

Scope (\_SB.PCI0)

{

Method (AR00, 0, NotSerialized)

{

Return (^^AR00)

}

Method (PR00, 0, NotSerialized)

{

Return (^^PR00)

}

Method (AR02, 0, NotSerialized)

{

Return (^^AR02)

}

Method (PR02, 0, NotSerialized)

{

Return (^^PR02)

}

Method (AR04, 0, NotSerialized)

{

Return (^^AR04)

}

Method (PR04, 0, NotSerialized)

{

Return (^^PR04)

}

Method (AR08, 0, NotSerialized)

{

Return (^^AR08)

}

Method (PR08, 0, NotSerialized)

{

Return (^^PR08)

}

Method (AR09, 0, NotSerialized)

{

Return (^^AR09)

}

Method (PR09, 0, NotSerialized)

{

Return (^^PR09)

}

Method (AR0E, 0, NotSerialized)

{

Return (^^AR0E)

}

Method (PR0E, 0, NotSerialized)

{

Return (^^PR0E)

}

Method (AR0F, 0, NotSerialized)

{

Return (^^AR0F)

}

Method (PR0F, 0, NotSerialized)

{

Return (^^PR0F)

}

Method (AR0A, 0, NotSerialized)

{

Return (^^AR0A)

}

Method (PR0A, 0, NotSerialized)

{

Return (^^PR0A)

}

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR00 ())

}

Return (PR00 ())

}

Device (TPMX)

{

Name (_HID, EisaId ("PNP0C01"))

Name (_UID, One)

Name (CRS, ResourceTemplate ()

{

Memory32Fixed (ReadOnly,

0xFED40000, // Address Base

0x00005000, // Address Length

)

})

Method (_CRS, 0, NotSerialized)

{

Return (CRS)

}

Method (_INI, 0, NotSerialized)

{

If (OSDW ())

{

Store (One, TPMF)

}

Method (_STA, 0, NotSerialized)

{

If (TPMF)

{

Return (Zero)

}

Return (0x0F)

}

Device (MCHC)

{

Name (_ADR, Zero)

Method (_STA, 0, NotSerialized)

{

If (OSDW ())

{

Return (0x0F)

}

Return (0x0B)

}

Device (PEG0)

{

Name (_ADR, 0x00010000)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR02 ())

}

Return (PR02 ())

}

Device (PXS1)

{

Name (_ADR, 0xFFFF)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Name (_SUN, One)

Method (_DSM, 4, NotSerialized)

{

If (OSDW ())

{

If (LNotEqual (And (^^HDAU.VID0, 0xFFFF), 0xFFFF))

{

If (LNotEqual (And (^^^IGPU.VID0, 0xFFFF), 0xFFFF))

{

Store (Package (0x02)

{

"hda-gfx",

Buffer (0x0A)

{

"onboard-2"

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Else

{

Store (Package (0x02)

{

"hda-gfx",

Buffer (0x0A)

{

"onboard-1"

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Return (Zero)

}

Device (HDAU)

{

Name (_ADR, One)

OperationRegion (HGFX, PCI_Config, Zero, 0x40)

Field (HGFX, ByteAcc, NoLock, Preserve)

{

VID0, 16,

DID0, 16

}

Method (_DSM, 4, NotSerialized)

{

If (OSDW ())

{

If (LNotEqual (And (VID0, 0xFFFF), 0xFFFF))

{

If (LNotEqual (And (^^^IGPU.VID0, 0xFFFF), 0xFFFF))

{

Store (Package (0x02)

{

"hda-gfx",

Buffer (0x0A)

{

"onboard-2"

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Else

{

Store (Package (0x02)

{

"hda-gfx",

Buffer (0x0A)

{

"onboard-1"

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Return (Zero)

}

Device (PEG1)

{

Name (_ADR, 0x00010001)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR0A ())

}

Return (PR0A ())

}

Device (PXS4)

{

Name (_ADR, 0xFFFF)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Name (_SUN, 0x04)

}

Device (SAT0)

{

Name (_ADR, 0x001F0002)

}

Device (SBUS)

{

Name (_ADR, 0x001F0003)

OperationRegion (SMBP, PCI_Config, 0x40, 0xC0)

Field (SMBP, DWordAcc, NoLock, Preserve)

{

, 2,

I2CE, 1

}

OperationRegion (SMPB, PCI_Config, 0x20, 0x04)

Field (SMPB, DWordAcc, NoLock, Preserve)

{

, 5,

SBAR, 11

}

OperationRegion (SMBI, SystemIO, ShiftLeft (SBAR, 0x05), 0x10)

Field (SMBI, ByteAcc, NoLock, Preserve)

{

HSTS, 8,

Offset (0x02),

HCON, 8,

HCOM, 8,

TXSA, 8,

DAT0, 8,

DAT1, 8,

HBDR, 8,

PECR, 8,

RXSA, 8,

SDAT, 16

}

Method (SSXB, 2, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

Store (0x48, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SRXB, 1, Serialized)

{

If (STRT ())

{

Return (0xFFFF)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (0x44, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (DAT0)

}

Return (0xFFFF)

}

Method (SWRB, 3, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

Store (Arg2, DAT0)

Store (0x48, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SRDB, 2, Serialized)

{

If (STRT ())

{

Return (0xFFFF)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (Arg1, HCOM)

Store (0x48, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (DAT0)

}

Return (0xFFFF)

}

Method (SWRW, 3, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

And (Arg2, 0xFF, DAT1)

And (ShiftRight (Arg2, 0x08), 0xFF, DAT0)

Store (0x4C, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SRDW, 2, Serialized)

{

If (STRT ())

{

Return (0xFFFF)

}

Store (Zero, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (Arg1, HCOM)

Store (0x4C, HCON)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (Or (ShiftLeft (DAT0, 0x08), DAT1))

}

Return (0xFFFFFFFF)

}

Method (SBLW, 4, Serialized)

{

If (STRT ())

{

Return (Zero)

}

Store (Arg3, I2CE)

Store (0xBF, HSTS)

Store (Arg0, TXSA)

Store (Arg1, HCOM)

Store (SizeOf (Arg2), DAT0)

Store (Zero, Local1)

Store (DerefOf (Index (Arg2, Zero)), HBDR)

Store (0x54, HCON)

While (LGreater (SizeOf (Arg2), Local1))

{

Store (0x4E20, Local0)

While (LAnd (LNot (And (HSTS, 0x80)), Local0))

{

Decrement (Local0)

}

If (LNot (Local0))

{

KILL ()

Return (Zero)

}

Increment (Local1)

If (LGreater (SizeOf (Arg2), Local1))

{

Store (DerefOf (Index (Arg2, Local1)), HBDR)

Store (0x80, HSTS)

}

Store (0x80, HSTS)

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (One)

}

Return (Zero)

}

Method (SBLR, 3, Serialized)

{

Name (TBUF, Buffer (0x0100) {})

If (STRT ())

{

Return (Zero)

}

Store (Arg2, I2CE)

Store (0xBF, HSTS)

Store (Or (Arg0, One), TXSA)

Store (Arg1, HCOM)

Store (0x54, HCON)

Store (0x0FA0, Local0)

While (LAnd (LNot (And (HSTS, 0x80)), Local0))

{

Decrement (Local0)

Stall (0x32)

}

If (LNot (Local0))

{

KILL ()

Return (Zero)

}

Store (DAT0, Index (TBUF, Zero))

Store (0x80, HSTS)

Store (One, Local1)

While (LLess (Local1, DerefOf (Index (TBUF, Zero))))

{

Store (0x0FA0, Local0)

While (LAnd (LNot (And (HSTS, 0x80)), Local0))

{

Decrement (Local0)

Stall (0x32)

}

If (LNot (Local0))

{

KILL ()

Return (Zero)

}

Store (HBDR, Index (TBUF, Local1))

Store (0x80, HSTS)

Increment (Local1)

}

If (COMP ())

{

Or (HSTS, 0xFF, HSTS)

Return (TBUF)

}

Return (Zero)

}

Method (STRT, 0, Serialized)

{

Store (0xC8, Local0)

While (Local0)

{

If (And (HSTS, 0x40))

{

Decrement (Local0)

Sleep (One)

If (LEqual (Local0, Zero))

{

Return (One)

}

Else

{

Store (Zero, Local0)

}

Store (0x0FA0, Local0)

While (Local0)

{

If (And (HSTS, One))

{

Decrement (Local0)

Stall (0x32)

If (LEqual (Local0, Zero))

{

KILL ()

}

Else

{

Return (Zero)

}

Return (One)

}

Method (COMP, 0, Serialized)

{

Store (0x0FA0, Local0)

While (Local0)

{

If (And (HSTS, 0x02))

{

Return (One)

}

Else

{

Decrement (Local0)

Stall (0x32)

If (LEqual (Local0, Zero))

{

KILL ()

}

Return (Zero)

}

Method (KILL, 0, Serialized)

{

Or (HCON, 0x02, HCON)

Or (HSTS, 0xFF, HSTS)

}

Device (BUS0)

{

Name (_CID, "smbus")

Name (_ADR, Zero)

}

Device (BUS1)

{

Name (_CID, "smbus")

Name (_ADR, One)

}

Device (SAT1)

{

Name (_ADR, 0x001F0005)

}

Device (LPCB)

{

Name (_ADR, 0x001F0000)

Scope (\_SB)

{

OperationRegion (PCI0.LPCB.LPC1, PCI_Config, 0x40, 0xC0)

Field (PCI0.LPCB.LPC1, AnyAcc, NoLock, Preserve)

{

Offset (0x20),

PARC, 8,

PBRC, 8,

PCRC, 8,

PDRC, 8,

Offset (0x28),

PERC, 8,

PFRC, 8,

PGRC, 8,

PHRC, 8,

Offset (0x6C),

Offset (0x6D),

Offset (0x6E),

XUSB, 1

}

Device (LNKA)

{

Name (_HID, EisaId ("PNP0C0F"))

Name (_UID, One)

Method (_DIS, 0, Serialized)

{

Or (PARC, 0x80, PARC)

}

Name (_PRS, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{1,3,4,5,6,7,10,12,14,15}

})

Method (_CRS, 0, Serialized)

{

Name (RTLA, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLA, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PARC, 0x0F), IRQ0)

Return (RTLA)

}

Method (_SRS, 1, Serialized)

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PARC)

}

Method (_STA, 0, Serialized)

{

If (And (PARC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKB)

{

Name (_HID, EisaId ("PNP0C0F"))

Name (_UID, 0x02)

Method (_DIS, 0, Serialized)

{

Or (PBRC, 0x80, PBRC)

}

Name (_PRS, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{1,3,4,5,6,7,11,12,14,15}

})

Method (_CRS, 0, Serialized)

{

Name (RTLB, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLB, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PBRC, 0x0F), IRQ0)

Return (RTLB)

}

Method (_SRS, 1, Serialized)

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PBRC)

}

Method (_STA, 0, Serialized)

{

If (And (PBRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKC)

{

Name (_HID, EisaId ("PNP0C0F"))

Name (_UID, 0x03)

Method (_DIS, 0, Serialized)

{

Or (PCRC, 0x80, PCRC)

}

Name (_PRS, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{1,3,4,5,6,7,10,12,14,15}

})

Method (_CRS, 0, Serialized)

{

Name (RTLC, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLC, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PCRC, 0x0F), IRQ0)

Return (RTLC)

}

Method (_SRS, 1, Serialized)

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PCRC)

}

Method (_STA, 0, Serialized)

{

If (And (PCRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKD)

{

Name (_HID, EisaId ("PNP0C0F"))

Name (_UID, 0x04)

Method (_DIS, 0, Serialized)

{

Or (PDRC, 0x80, PDRC)

}

Name (_PRS, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{1,3,4,5,6,7,11,12,14,15}

})

Method (_CRS, 0, Serialized)

{

Name (RTLD, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLD, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PDRC, 0x0F), IRQ0)

Return (RTLD)

}

Method (_SRS, 1, Serialized)

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PDRC)

}

Method (_STA, 0, Serialized)

{

If (And (PDRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKE)

{

Name (_HID, EisaId ("PNP0C0F"))

Name (_UID, 0x05)

Method (_DIS, 0, Serialized)

{

Or (PERC, 0x80, PERC)

}

Name (_PRS, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{1,3,4,5,6,7,10,12,14,15}

})

Method (_CRS, 0, Serialized)

{

Name (RTLE, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLE, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PERC, 0x0F), IRQ0)

Return (RTLE)

}

Method (_SRS, 1, Serialized)

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PERC)

}

Method (_STA, 0, Serialized)

{

If (And (PERC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKF)

{

Name (_HID, EisaId ("PNP0C0F"))

Name (_UID, 0x06)

Method (_DIS, 0, Serialized)

{

Or (PFRC, 0x80, PFRC)

}

Name (_PRS, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{1,3,4,5,6,7,11,12,14,15}

})

Method (_CRS, 0, Serialized)

{

Name (RTLF, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLF, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PFRC, 0x0F), IRQ0)

Return (RTLF)

}

Method (_SRS, 1, Serialized)

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PFRC)

}

Method (_STA, 0, Serialized)

{

If (And (PFRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKG)

{

Name (_HID, EisaId ("PNP0C0F"))

Name (_UID, 0x07)

Method (_DIS, 0, Serialized)

{

Or (PGRC, 0x80, PGRC)

}

Name (_PRS, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{1,3,4,5,6,7,10,12,14,15}

})

Method (_CRS, 0, Serialized)

{

Name (RTLG, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLG, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PGRC, 0x0F), IRQ0)

Return (RTLG)

}

Method (_SRS, 1, Serialized)

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PGRC)

}

Method (_STA, 0, Serialized)

{

If (And (PGRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

Device (LNKH)

{

Name (_HID, EisaId ("PNP0C0F"))

Name (_UID, 0x08)

Method (_DIS, 0, Serialized)

{

Or (PHRC, 0x80, PHRC)

}

Name (_PRS, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{1,3,4,5,6,7,11,12,14,15}

})

Method (_CRS, 0, Serialized)

{

Name (RTLH, ResourceTemplate ()

{

IRQ (Level, ActiveLow, Shared, )

{}

})

CreateWordField (RTLH, One, IRQ0)

Store (Zero, IRQ0)

ShiftLeft (One, And (PHRC, 0x0F), IRQ0)

Return (RTLH)

}

Method (_SRS, 1, Serialized)

{

CreateWordField (Arg0, One, IRQ0)

FindSetRightBit (IRQ0, Local0)

Decrement (Local0)

Store (Local0, PHRC)

}

Method (_STA, 0, Serialized)

{

If (And (PHRC, 0x80))

{

Return (0x09)

}

Else

{

Return (0x0B)

}

OperationRegion (LPC0, PCI_Config, 0x40, 0xC0)

Field (LPC0, AnyAcc, NoLock, Preserve)

{

Offset (0x40),

IOD0, 8,

IOD1, 8,

Offset (0xB0),

RAEN, 1,

, 13,

RCBA, 18

}

OperationRegion (LPCR, PCI_Config, 0x80, 0x04)

Field (LPCR, ByteAcc, NoLock, Preserve)

{

CADR, 3,

, 1,

CBDR, 3,

Offset (0x01),

LTDR, 2,

, 2,

FDDR, 1,

Offset (0x02),

CALE, 1,

CBLE, 1,

LTLE, 1,

FDLE, 1,

Offset (0x03),

GLLE, 1,

GHLE, 1,

KCLE, 1,

MCLE, 1,

C1LE, 1,

C2LE, 1,

Offset (0x04)

}

OperationRegion (CPSB, SystemMemory, 0x5D9EDF98, 0x10)

Field (CPSB, AnyAcc, NoLock, Preserve)

{

RTCX, 1,

SBB0, 7,

SBB1, 8,

SBB2, 8,

SBB3, 8,

SBB4, 8,

SBB5, 8,

SBB6, 8,

SBB7, 8,

SBB8, 8,

SBB9, 8,

SBBA, 8,

SBBB, 8,

SBBC, 8,

SBBD, 8,

SBBE, 8,

SBBF, 8

}

Method (SPTS, 1, NotSerialized)

{

Store (One, SLPX)

If (LEqual (Arg0, One))

{

Store (One, LEDU)

Store (Zero, LEDD)

Store (One, LEDB)

}

Store (One, SLPE)

}

Method (SWAK, 1, NotSerialized)

{

If (LEqual (Arg0, One))

{

Store (One, LEDU)

Store (Zero, LEDD)

Store (Zero, LEDV)

Store (Zero, LEDB)

}

Store (Zero, SLPE)

If (RTCX) {}

Else

{

Notify (PWRB, 0x02)

}

Method (UXDV, 1, Serialized)

{

Store (0xFF, Local0)

Name (TMP0, Zero)

Store (Add (Arg0, Zero), TMP0)

If (LEqual (TMP0, 0x03F8))

{

Store (Zero, Local0)

}

Else

{

If (LEqual (TMP0, 0x02F8))

{

Store (One, Local0)

}

Else

{

If (LEqual (TMP0, 0x0220))

{

Store (0x02, Local0)

}

Else

{

If (LEqual (TMP0, 0x0228))

{

Store (0x03, Local0)

}

Else

{

If (LEqual (TMP0, 0x0238))

{

Store (0x04, Local0)

}

Else

{

If (LEqual (TMP0, 0x02E8))

{

Store (0x05, Local0)

}

Else

{

If (LEqual (TMP0, 0x0338))

{

Store (0x06, Local0)

}

Else

{

If (LEqual (TMP0, 0x03E8))

{

Store (0x07, Local0)

}

Return (Local0)

}

Method (RRIO, 4, Serialized)

{

Name (TMP0, Zero)

Store (Add (Arg0, Zero), TMP0)

If (LEqual (TMP0, Zero))

{

Store (Zero, CALE)

Store (UXDV (Arg2), Local0)

If (LNotEqual (Local0, 0xFF))

{

Store (Local0, CADR)

}

If (Arg1)

{

Store (One, CALE)

}

Else

{

If (LEqual (TMP0, One))

{

Store (Zero, CBLE)

Store (UXDV (Arg2), Local0)

If (LNotEqual (Local0, 0xFF))

{

Store (Local0, CBDR)

}

If (Arg1)

{

Store (One, CBLE)

}

Else

{

If (LEqual (TMP0, 0x02))

{

Store (Zero, LTLE)

If (LEqual (Arg2, 0x0378))

{

Store (Zero, LTDR)

}

If (LEqual (Arg2, 0x0278))

{

Store (One, LTDR)

}

If (LEqual (Arg2, 0x03BC))

{

Store (0x02, LTDR)

}

If (Arg1)

{

Store (One, LTLE)

}

Else

{

If (LEqual (TMP0, 0x03))

{

Store (Zero, FDLE)

If (LEqual (Arg2, 0x03F0))

{

Store (Zero, FDDR)

}

If (LEqual (Arg2, 0x0370))

{

Store (One, FDDR)

}

If (Arg1)

{

Store (One, FDLE)

}

Else

{

If (LEqual (TMP0, 0x08))

{

If (LEqual (Arg2, 0x0200))

{

If (Arg1)

{

Store (One, GLLE)

}

Else

{

Store (Zero, GLLE)

}

If (LEqual (Arg2, 0x0208))

{

If (Arg1)

{

Store (One, GHLE)

}

Else

{

Store (Zero, GHLE)

}

Else

{

If (LEqual (TMP0, 0x09))

{

If (LEqual (Arg2, 0x0200))

{

If (Arg1)

{

Store (One, GLLE)

}

Else

{

Store (Zero, GLLE)

}

If (LEqual (Arg2, 0x0208))

{

If (Arg1)

{

Store (One, GHLE)

}

Else

{

Store (Zero, GHLE)

}

Else

{

If (LEqual (TMP0, 0x0A))

{

If (LOr (LEqual (Arg2, 0x60), LEqual (Arg2, 0x64)))

{

If (Arg1)

{

Store (One, KCLE)

}

Else

{

Store (Zero, KCLE)

}

Else

{

If (LEqual (TMP0, 0x0B))

{

If (LOr (LEqual (Arg2, 0x62), LEqual (Arg2, 0x66)))

{

If (Arg1)

{

Store (One, MCLE)

}

Else

{

Store (Zero, MCLE)

}

Else

{

If (LEqual (TMP0, 0x0C))

{

If (LEqual (Arg2, 0x2E))

{

If (Arg1)

{

Store (One, C1LE)

}

Else

{

Store (Zero, C1LE)

}

If (LEqual (Arg2, 0x4E))

{

If (Arg1)

{

Store (One, C2LE)

}

Else

{

Store (Zero, C2LE)

}

Else

{

If (LEqual (TMP0, 0x0D))

{

If (LEqual (Arg2, 0x2E))

{

If (Arg1)

{

Store (One, C1LE)

}

Else

{

Store (Zero, C1LE)

}

If (LEqual (Arg2, 0x4E))

{

If (Arg1)

{

Store (One, C2LE)

}

Else

{

Store (Zero, C2LE)

}

Method (RDMA, 3, NotSerialized)

{

}

Device (DMAC)

{

Name (_HID, EisaId ("PNP0200"))

Name (_CRS, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x20, // Length

)

IO (Decode16,

0x0081, // Range Minimum

0x0081, // Range Maximum

0x01, // Alignment

0x11, // Length

)

IO (Decode16,

0x0093, // Range Minimum

0x0093, // Range Maximum

0x01, // Alignment

0x0D, // Length

)

IO (Decode16,

0x00C0, // Range Minimum

0x00C0, // Range Maximum

0x01, // Alignment

0x20, // Length

)

DMA (Compatibility, NotBusMaster, Transfer8_16, )

{4}

})

}

Device (FWHD)

{

Name (_HID, EisaId ("INT0800"))

Name (_CRS, ResourceTemplate ()

{

Memory32Fixed (ReadOnly,

0xFF000000, // Address Base

0x01000000, // Address Length

)

})

}

Device (HPET)

{

Name (_HID, EisaId ("PNP0103"))

Name (_CID, EisaId ("PNP0C01"))

Name (BUF0, ResourceTemplate ()

{

IRQNoFlags ()

{0}

IRQNoFlags ()

{8}

Memory32Fixed (ReadWrite,

0xFED00000, // Address Base

0x00000400, // Address Length

_Y0E)

})

Method (_STA, 0, NotSerialized)

{

If (LGreaterEqual (OSYS, 0x07D1))

{

If (HPAE)

{

Return (0x0F)

}

Else

{

If (HPAE)

{

Return (0x0B)

}

Return (Zero)

}

Method (_CRS, 0, Serialized)

{

If (HPAE)

{

CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y0E._BAS, HPT0)

If (LEqual (HPAS, One))

{

Store (0xFED01000, HPT0)

}

If (LEqual (HPAS, 0x02))

{

Store (0xFED02000, HPT0)

}

If (LEqual (HPAS, 0x03))

{

Store (0xFED03000, HPT0)

}

Return (BUF0)

}

Device (IPIC)

{

Name (_HID, EisaId ("PNP0000"))

Name (_CRS, ResourceTemplate ()

{

IO (Decode16,

0x0020, // Range Minimum

0x0020, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0024, // Range Minimum

0x0024, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0028, // Range Minimum

0x0028, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x002C, // Range Minimum

0x002C, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0030, // Range Minimum

0x0030, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0034, // Range Minimum

0x0034, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0038, // Range Minimum

0x0038, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x003C, // Range Minimum

0x003C, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00A0, // Range Minimum

0x00A0, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00A4, // Range Minimum

0x00A4, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00A8, // Range Minimum

0x00A8, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00AC, // Range Minimum

0x00AC, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00B0, // Range Minimum

0x00B0, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00B4, // Range Minimum

0x00B4, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00B8, // Range Minimum

0x00B8, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x00BC, // Range Minimum

0x00BC, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x04D0, // Range Minimum

0x04D0, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IRQNoFlags ()

{2}

})

}

Device (MATH)

{

Name (_HID, EisaId ("PNP0C04"))

Name (_CRS, ResourceTemplate ()

{

IO (Decode16,

0x00F0, // Range Minimum

0x00F0, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IRQNoFlags ()

{13}

})

}

Device (LDRC)

{

Name (_HID, EisaId ("PNP0C02"))

Name (_UID, 0x02)

Name (_CRS, ResourceTemplate ()

{

IO (Decode16,

0x002E, // Range Minimum

0x002E, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x004E, // Range Minimum

0x004E, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0061, // Range Minimum

0x0061, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0063, // Range Minimum

0x0063, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0065, // Range Minimum

0x0065, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0067, // Range Minimum

0x0067, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0080, // Range Minimum

0x0080, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x0092, // Range Minimum

0x0092, // Range Maximum

0x01, // Alignment

0x01, // Length

)

IO (Decode16,

0x00B2, // Range Minimum

0x00B2, // Range Maximum

0x01, // Alignment

0x02, // Length

)

IO (Decode16,

0x0200, // Range Minimum

0x0200, // Range Maximum

0x01, // Alignment

0x10, // Length

)

IO (Decode16,

0x0400, // Range Minimum

0x0400, // Range Maximum

0x01, // Alignment

0x80, // Length

)

IO (Decode16,

0x0500, // Range Minimum

0x0500, // Range Maximum

0x01, // Alignment

0x80, // Length

)

})

}

Device (RTC)

{

Name (_HID, EisaId ("PNP0B00"))

Name (_CRS, ResourceTemplate ()

{

IO (Decode16,

0x0070, // Range Minimum

0x0070, // Range Maximum

0x01, // Alignment

0x08, // Length

)

})

}

Device (SIO1)

{

Name (_HID, EisaId ("PNP0C02"))

Name (_UID, 0x0111)

Name (CRS, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y0F)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y10)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y11)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x00, // Alignment

0x00, // Length

_Y12)

})

Method (_CRS, 0, NotSerialized)

{

If (LAnd (LLess (SP1O, 0x03F0), LGreater (SP1O, 0xF0)))

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y0F._MIN, IOIM)

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y0F._MAX, IOIX)

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y0F._LEN, IOIL)

Store (SP1O, IOIM)

Store (SP1O, IOIX)

Store (0x02, IOIL)

}

If (GPIB)

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y10._MIN, GP0M)

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y10._MAX, GP0X)

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y10._LEN, GP0L)

Store (GPIB, GP0M)

Store (GPIB, GP0X)

Store (GPIL, GP0L)

}

If (HWMB)

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y11._MIN, HW0M)

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y11._MAX, HW0X)

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y11._LEN, HW0L)

Store (HWMB, HW0M)

Store (HWMB, HW0X)

Store (HWML, HW0L)

}

If (PMEB)

{

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y12._MIN, PM0M)

CreateWordField (CRS, \_SB.PCI0.LPCB.SIO1._Y12._MAX, PM0X)

CreateByteField (CRS, \_SB.PCI0.LPCB.SIO1._Y12._LEN, PM0L)

Store (PMEB, PM0M)

Store (PMEB, PM0X)

Store (PMEL, PM0L)

}

Return (CRS)

}

Method (_STA, 0, NotSerialized)

{

If (OSDW ())

{

Return (Zero)

}

Return (0x0F)

}

Name (DCAT, Package (0x16)

{

One,

0x02,

0x03,

Zero,

0xFF,

0x05,

0xFF,

0x06,

0xFF,

0x0A,

0xFF,

0xFF

})

Mutex (MUT0, 0x00)

Method (ENFG, 1, NotSerialized)

{

Acquire (MUT0, 0xFFFF)

Store (0x87, INDX)

Store (One, INDX)

Store (0x55, INDX)

If (LEqual (SP1O, 0x2E))

{

Store (0x55, INDX)

}

Else

{

Store (0xAA, INDX)

}

Store (Arg0, LDN)

}

Method (EXFG, 0, NotSerialized)

{

Store (0x02, INDX)

Store (0x02, DATA)

Release (MUT0)

}

Method (LPTM, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

And (OPT0, Arg0, Local0)

EXFG ()

Return (Local0)

}

Method (UHID, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

And (OPT0, 0x70, Local0)

EXFG ()

If (Local0)

{

Return (0x1005D041)

}

Else

{

Return (0x0105D041)

}

OperationRegion (IOID, SystemIO, SP1O, 0x02)

Field (IOID, ByteAcc, NoLock, Preserve)

{

INDX, 8,

DATA, 8

}

IndexField (INDX, DATA, ByteAcc, NoLock, Preserve)

{

Offset (0x07),

LDN, 8,

Offset (0x21),

SCF1, 8,

SCF2, 8,

SCF3, 8,

SCF4, 8,

SCF5, 8,

SCF6, 8,

Offset (0x29),

CKCF, 8,

Offset (0x30),

ACTR, 8,

Offset (0x60),

IOAH, 8,

IOAL, 8,

IOH2, 8,

IOL2, 8,

Offset (0x70),

INTR, 8,

Offset (0x74),

DMCH, 8,

Offset (0xE0),

RGE0, 8,

RGE1, 8,

RGE2, 8,

RGE3, 8,

RGE4, 8,

RGE5, 8,

RGE6, 8,

RGE7, 8,

RGE8, 8,

RGE9, 8,

Offset (0xF0),

OPT0, 8,

OPT1, 8,

OPT2, 8,

OPT3, 8,

OPT4, 8,

OPT5, 8,

OPT6, 8,

OPT7, 8,

OPT8, 8,

OPT9, 8

}

OperationRegion (RNTR, SystemIO, PMEB, PMEL)

Field (RNTR, ByteAcc, NoLock, Preserve)

{

PMES, 8,

Offset (0x04),

PMEE, 1,

Offset (0x05),

Offset (0x08),

PMS3, 8,

PMS2, 8,

PMS1, 8,

Offset (0x0C),

PME3, 8,

PME2, 8,

PME1, 8

}

Method (CGLD, 1, NotSerialized)

{

Return (DerefOf (Index (DCAT, Arg0)))

}

Method (DSTA, 1, NotSerialized)

{

ENFG (CGLD (Arg0))

Store (ACTR, Local0)

EXFG ()

If (LEqual (Local0, 0xFF))

{

Return (Zero)

}

And (Local0, One, Local0)

If (LGreaterEqual (Arg0, 0x10))

{

Or (IOES, ShiftLeft (Local0, And (Arg0, 0x0F)), IOES)

}

Else

{

Or (IOST, ShiftLeft (Local0, Arg0), IOST)

}

If (Local0)

{

Return (0x0F)

}

Else

{

If (LGreaterEqual (Arg0, 0x10))

{

Store (IOES, Local0)

}

Else

{

Store (IOST, Local0)

}

And (Arg0, 0x0F, Local1)

If (And (ShiftLeft (One, Local1), Local0))

{

Return (0x0D)

}

Else

{

Return (Zero)

}

Method (DCNT, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

If (LAnd (LLess (DMCH, 0x04), LNotEqual (And (DMCH, 0x03,

Local1), Zero)))

{

RDMA (Arg0, Arg1, Increment (Local1))

}

Store (Arg1, ACTR)

ShiftLeft (IOAH, 0x08, Local1)

Or (IOAL, Local1, Local1)

RRIO (Arg0, Arg1, Local1, 0x08)

EXFG ()

}

Name (CRS1, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y15)

IRQNoFlags (_Y13)

{}

DMA (Compatibility, NotBusMaster, Transfer8, _Y14)

{}

})

CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y13._INT, IRQM)

CreateByteField (CRS1, \_SB.PCI0.LPCB.SIO1._Y14._DMA, DMAM)

CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y15._MIN, IO11)

CreateWordField (CRS1, \_SB.PCI0.LPCB.SIO1._Y15._MAX, IO12)

CreateByteField (CRS1, \_SB.PCI0.LPCB.SIO1._Y15._LEN, LEN1)

Name (CRS2, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y18)

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y19)

IRQNoFlags (_Y16)

{}

DMA (Compatibility, NotBusMaster, Transfer8, _Y17)

{2}

})

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y16._INT, IRQE)

CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y17._DMA, DMAE)

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y18._MIN, IO21)

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y18._MAX, IO22)

CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y18._LEN, LEN2)

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y19._MIN, IO31)

CreateWordField (CRS2, \_SB.PCI0.LPCB.SIO1._Y19._MAX, IO32)

CreateByteField (CRS2, \_SB.PCI0.LPCB.SIO1._Y19._LEN, LEN3)

Name (CRS4, ResourceTemplate ()

{

IO (Decode16,

0x0000, // Range Minimum

0x0000, // Range Maximum

0x01, // Alignment

0x00, // Length

_Y1B)

IRQ (Edge, ActiveLow, Shared, _Y1A)

{}

})

CreateWordField (CRS4, \_SB.PCI0.LPCB.SIO1._Y1A._INT, IRQL)

CreateWordField (CRS4, \_SB.PCI0.LPCB.SIO1._Y1B._MIN, IOHL)

CreateWordField (CRS4, \_SB.PCI0.LPCB.SIO1._Y1B._MAX, IORL)

CreateByteField (CRS4, \_SB.PCI0.LPCB.SIO1._Y1B._ALN, ALMN)

CreateByteField (CRS4, \_SB.PCI0.LPCB.SIO1._Y1B._LEN, LENG)

Method (DCRS, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

ShiftLeft (IOAH, 0x08, IO11)

Or (IOAL, IO11, IO11)

Store (IO11, IO12)

Store (0x08, LEN1)

If (INTR)

{

ShiftLeft (One, INTR, IRQM)

}

Else

{

Store (Zero, IRQM)

}

If (LOr (LGreater (DMCH, 0x03), LEqual (Arg1, Zero)))

{

Store (Zero, DMAM)

}

Else

{

And (DMCH, 0x03, Local1)

ShiftLeft (One, Local1, DMAM)

}

EXFG ()

Return (CRS1)

}

Method (DCR2, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

ShiftLeft (IOAH, 0x08, IO21)

Or (IOAL, IO21, IO21)

Store (IO21, IO22)

Store (0x08, LEN2)

ShiftLeft (IOH2, 0x08, IO31)

Or (IOL2, IO31, IO31)

Store (IO21, IO32)

Store (0x08, LEN3)

If (INTR)

{

ShiftLeft (One, INTR, IRQE)

}

Else

{

Store (Zero, IRQE)

}

If (LOr (LGreater (DMCH, 0x03), LEqual (Arg1, Zero)))

{

Store (Zero, DMAE)

}

Else

{

And (DMCH, 0x03, Local1)

ShiftLeft (One, Local1, DMAE)

}

EXFG ()

Return (CRS2)

}

Method (DCR4, 2, NotSerialized)

{

ENFG (CGLD (Arg0))

ShiftLeft (IOAH, 0x08, IOHL)

Or (IOAL, IOHL, IOHL)

Store (IOHL, IORL)

Store (0x08, LENG)

If (INTR)

{

And (INTR, 0x0F, INTR)

ShiftLeft (One, INTR, IRQL)

}

Else

{

Store (Zero, IRQL)

}

EXFG ()

Return (CRS4)

}

Method (DSRS, 2, NotSerialized)

{

If (LEqual (Arg1, 0x02))

{

If (LPTM (Arg1))

{

DSR2 (Arg0, Arg1)

}

Else

{

CreateWordField (Arg0, 0x09, IRQM)

CreateByteField (Arg0, 0x0C, DMAM)

CreateWordField (Arg0, 0x02, IO11)

ENFG (CGLD (Arg1))

And (IO11, 0xFF, IOAL)

ShiftRight (IO11, 0x08, IOAH)

If (IRQM)

{

FindSetRightBit (IRQM, Local0)

Subtract (Local0, One, INTR)

}

Else

{

Store (Zero, INTR)

}

If (DMAM)

{

FindSetRightBit (DMAM, Local0)

Subtract (Local0, One, DMCH)

}

Else

{

Store (0x04, DMCH)

}

EXFG ()

DCNT (Arg1, One)

Store (Arg1, Local2)

If (LGreater (Local2, Zero))

{

Subtract (Local2, One, Local2)

}

Method (DSR2, 2, NotSerialized)

{

CreateWordField (Arg0, 0x11, IRQT)

CreateByteField (Arg0, 0x14, DMAT)

CreateWordField (Arg0, 0x02, IOT1)

CreateWordField (Arg0, 0x0A, IOT2)

ENFG (CGLD (Arg1))

And (IOT1, 0xFF, IOAL)

ShiftRight (IOT1, 0x08, IOAH)

And (IOT2, 0xFF, IOL2)

ShiftRight (IOT2, 0x08, IOH2)

If (IRQT)

{

FindSetRightBit (IRQT, Local0)

Subtract (Local0, One, INTR)

}

Else

{

Store (Zero, INTR)

}

If (DMAT)

{

FindSetRightBit (DMAT, Local0)

Subtract (Local0, One, DMCH)

}

Else

{

Store (0x04, DMCH)

}

EXFG ()

DCNT (Arg1, One)

Store (Arg1, Local2)

If (LGreater (Local2, Zero))

{

Subtract (Local2, One, Local2)

}

Method (DSR4, 2, NotSerialized)

{

CreateWordField (Arg0, 0x02, IOHL)

CreateWordField (Arg0, 0x09, IRQL)

ENFG (CGLD (Arg1))

And (IOHL, 0xFF, IOAL)

ShiftRight (IOHL, 0x08, IOAH)

If (IRQL)

{

FindSetRightBit (IRQL, Local0)

Subtract (Local0, One, INTR)

}

Else

{

Store (Zero, INTR)

}

EXFG ()

DCNT (Arg1, One)

Store (Arg1, Local2)

If (LGreater (Local2, Zero))

{

Subtract (Local2, One, Local2)

}

Name (PMFG, Zero)

Method (SIOS, 1, NotSerialized)

{

Store ("SIOS", Debug)

If (LNotEqual (0x05, Arg0))

{

^SIO1.ENFG (0x04)

If (KBFG)

{

Or (^SIO1.OPT0, 0x08, ^SIO1.OPT0)

}

Else

{

And (^SIO1.OPT0, 0xF7, ^SIO1.OPT0)

}

If (MSFG)

{

Or (^SIO1.OPT0, 0x10, ^SIO1.OPT0)

}

Else

{

And (^SIO1.OPT0, 0xEF, ^SIO1.OPT0)

}

Store (0xFF, ^SIO1.OPT1)

And (0xBF, ^SIO1.OPT2, Local0)

Store (Local0, ^SIO1.OPT2)

Store (0x06, ^SIO1.LDN)

Store (Zero, ^SIO1.ACTR)

Store (0x05, ^SIO1.LDN)

Store (Zero, ^SIO1.ACTR)

^SIO1.EXFG ()

}

Method (SIOW, 1, NotSerialized)

{

Store ("SIOW", Debug)

^SIO1.ENFG (0x04)

Store (^SIO1.OPT1, PMFG)

Store (0xFF, ^SIO1.OPT1)

And (^SIO1.OPT0, 0xE7, ^SIO1.OPT0)

Or (0x40, ^SIO1.OPT2, Local0)

Store (Local0, ^SIO1.OPT2)

Store (0x06, ^SIO1.LDN)

Store (One, ^SIO1.ACTR)

Store (0x05, ^SIO1.LDN)

Store (One, ^SIO1.ACTR)

^SIO1.EXFG ()

}

Method (SIOH, 0, NotSerialized)

{

If (And (PMFG, 0x08))

{

Notify (PS2K, 0x02)

}

If (And (PMFG, 0x10))

{

Notify (PS2M, 0x02)

}

Device (PS2K)

{

Name (_HID, EisaId ("PNP0303"))

Name (_CID, EisaId ("PNP030B"))

Name (_PRW, Package (0x02)

{

0x1D,

0x03

})

Method (_STA, 0, NotSerialized)

{

If (OSDW ())

{

Return (Zero)

}

If (And (IOST, 0x0400))

{

Return (0x0F)

}

Return (Zero)

}

Name (_CRS, ResourceTemplate ()

{

IO (Decode16,

0x0060, // Range Minimum

0x0060, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0064, // Range Minimum

0x0064, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IRQNoFlags ()

{1}

})

Name (_PRS, ResourceTemplate ()

{

StartDependentFn (0x00, 0x00)

{

FixedIO (

0x0060, // Address

0x01, // Length

)

FixedIO (

0x0064, // Address

0x01, // Length

)

IRQNoFlags ()

{1}

}

EndDependentFn ()

})

Method (_PSW, 1, NotSerialized)

{

Store (Arg0, KBFG)

}

Device (PS2M)

{

Name (_HID, EisaId ("PNP0F03"))

Name (_CID, EisaId ("PNP0F13"))

Name (_PRW, Package (0x02)

{

0x1D,

0x03

})

Method (_STA, 0, NotSerialized)

{

If (OSDW ())

{

Return (Zero)

}

If (And (IOST, 0x4000))

{

Return (0x0F)

}

Return (Zero)

}

Name (CRS1, ResourceTemplate ()

{

IRQNoFlags ()

{12}

})

Name (CRS2, ResourceTemplate ()

{

IO (Decode16,

0x0060, // Range Minimum

0x0060, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IO (Decode16,

0x0064, // Range Minimum

0x0064, // Range Maximum

0x00, // Alignment

0x01, // Length

)

IRQNoFlags ()

{12}

})

Method (_CRS, 0, NotSerialized)

{

If (And (IOST, 0x0400))

{

Return (CRS1)

}

Else

{

Return (CRS2)

}

Name (_PRS, ResourceTemplate ()

{

StartDependentFn (0x00, 0x00)

{

IRQNoFlags ()

{12}

}

EndDependentFn ()

})

Method (_PSW, 1, NotSerialized)

{

Store (Arg0, MSFG)

}

Device (TIMR)

{

Name (_HID, EisaId ("PNP0100"))

Name (_CRS, ResourceTemplate ()

{

IO (Decode16,

0x0040, // Range Minimum

0x0040, // Range Maximum

0x01, // Alignment

0x04, // Length

)

IO (Decode16,

0x0050, // Range Minimum

0x0050, // Range Maximum

0x10, // Alignment

0x04, // Length

)

})

}

Device (CWDT)

{

Name (_HID, EisaId ("INT3F0D"))

Name (_CID, EisaId ("PNP0C02"))

Name (BUF0, ResourceTemplate ()

{

IO (Decode16,

0x0454, // Range Minimum

0x0454, // Range Maximum

0x04, // Alignment

0x04, // Length

)

})

Method (_INI, 0, NotSerialized)

{

If (OSDW ())

{

Store (Zero, WDTE)

}

Method (_STA, 0, Serialized)

{

If (LEqual (WDTE, One))

{

Return (0x0F)

}

Else

{

Return (Zero)

}

Method (_CRS, 0, Serialized)

{

Return (BUF0)

}

Device (IMEI)

{

Name (_ADR, 0x00160000)

Name (IGID, Zero)

Method (_STA, 0, NotSerialized)

{

If (OSDW ())

{

Return (0x0F)

}

Return (0x0B)

}

Method (_DSM, 4, NotSerialized)

{

If (OSDW ())

{

If (LNotEqual (And (^^IGPU.VID0, 0xFFFF), 0xFFFF))

{

Store (^^IGPU.DID0, IGID)

If (LOr (LEqual (IGID, 0x0112), LEqual (IGID, 0x0122)))

{

Store (Package (0x02)

{

"device-id",

Buffer (0x04)

{

0x3A, 0x1C, 0x00, 0x00

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Else

{

Return (Zero)

}

Return (Zero)

}

Device (HDEF)

{

Name (_ADR, 0x001B0000)

Name (_PRW, Package (0x02)

{

0x0D,

0x04

})

OperationRegion (HDAR, PCI_Config, Zero, 0x60)

Field (HDAR, WordAcc, NoLock, Preserve)

{

VID0, 16,

DID0, 16,

Offset (0x4C),

DCKA, 1,

Offset (0x4D),

DCKM, 1,

, 6,

DCKS, 1,

Offset (0x54),

, 15,

PMES, 1

}

Method (_DSM, 4, NotSerialized)

{

If (OSDW ())

{

If (LNotEqual (And (^^IGPU.VID0, 0xFFFF), 0xFFFF))

{

Store (Package (0x02)

{

"hda-gfx",

Buffer (0x0A)

{

"onboard-1"

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Return (Zero)

}

Device (RP01)

{

Name (_ADR, 0x001C0000)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR04 ())

}

Return (PR04 ())

}

Device (RP05)

{

Name (_ADR, 0x001C0004)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR08 ())

}

Return (PR08 ())

}

Device (GIGE)

{

Name (_ADR, Zero)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Method (_DSM, 4, NotSerialized)

{

If (OSDW ())

{

Store (Package (0x02)

{

"model",

Buffer (0x34)

{

"Intel Corporation 82574L Gigabit Network Connection"

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Return (Zero)

}

Device (RP06)

{

Name (_ADR, 0x001C0005)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR09 ())

}

Return (PR09 ())

}

Device (PXS2)

{

Name (_ADR, Zero)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Name (_SUN, 0x02)

}

Device (RP07)

{

Name (_ADR, 0x001C0006)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR0E ())

}

Return (PR0E ())

}

Device (PXS3)

{

Name (_ADR, Zero)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Name (_SUN, 0x03)

}

Device (RP08)

{

Name (_ADR, 0x001C0007)

Name (_PRW, Package (0x02)

{

0x09,

0x04

})

Method (_PRT, 0, NotSerialized)

{

If (PICM)

{

Return (AR0F ())

}

Return (PR0F ())

}

Device (FWBR)

{

Name (_ADR, Zero)

}

Device (PWRB)

{

Name (_HID, EisaId ("PNP0C0C"))

Name (_UID, 0xAA)

Name (_STA, 0x0B)

Name (_PRW, Package (0x02)

{

0x1D,

0x03

})

}

Scope (_SB.PCI0)

{

Device (EHC1)

{

Name (_ADR, 0x001D0000)

Method (_S3D, 0, NotSerialized)

{

Return (0x03)

}

Method (_S4D, 0, NotSerialized)

{

Return (0x03)

}

Device (RHUB)

{

Name (_ADR, Zero)

Device (PRT1)

{

Name (_ADR, One)

Name (_UPC, Package (0x04)

{

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Device (PRT1)

{

Name (_ADR, One)

Name (_UPC, Package (0x04)

{

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Method (_RMV, 0, NotSerialized)

{

Return (Zero)

}

Name (MUXS, "XHCA")

}

Device (PRT2)

{

Name (_ADR, 0x02)

Name (_UPC, Package (0x04)

{

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Method (_RMV, 0, NotSerialized)

{

Return (Zero)

}

Device (PRT3)

{

Name (_ADR, 0x03)

Name (_UPC, Package (0x04)

{

Zero,

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Name (MUXS, "XHCC")

}

Device (PRT8)

{

Name (_ADR, 0x08)

Name (_UPC, Package (0x04)

{

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Name (HERB, 0x02)

Device (PRT1)

{

Name (_ADR, One)

Name (_UPC, Package (0x04)

{

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

}

Device (PRT2)

{

Name (_ADR, 0x02)

Name (_UPC, Package (0x04)

{

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

}

Device (PRT3)

{

Name (_ADR, 0x03)

Name (_UPC, Package (0x04)

{

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

}

Method (SRST, 1, Serialized)

{

If (LEqual (Arg0, One))

{

Store (Zero, GD14)

Store (One, GP14)

}

Else

{

If (LEqual (Arg0, Zero))

{

Store (One, GD14)

}

Method (MBSD, 0, NotSerialized)

{

Return (One)

}

Name (_PRW, Package (0x02)

{

0x0D,

0x04

})

Method (_DSM, 4, NotSerialized)

{

If (OSDW ())

{

Store (Package (0x0B)

{

"AAPL,current-available",

0x0834,

"AAPL,current-extra",

0x0898,

"AAPL,current-extra-in-sleep",

0x0640,

"AAPL,max-port-current-in-sleep",

0x0834,

"AAPL,device-internal",

Zero,

Buffer (One)

{

0x00

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Return (Zero)

}

Method (XHCN, 0, NotSerialized)

{

Return (One)

}

Device (EHC2)

{

Name (_ADR, 0x001A0000)

Method (_S3D, 0, NotSerialized)

{

Return (0x03)

}

Method (_S4D, 0, NotSerialized)

{

Return (0x03)

}

Method (XHCA, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (One, ^^XHC1.PASS)

}

Store (One, ^^XHC1.PAHC)

}

Method (XHCB, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (One, ^^XHC1.PBSS)

}

Store (One, ^^XHC1.PBHC)

Store (One, GI60)

}

Method (XHCC, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (One, ^^XHC1.PCSS)

}

Store (One, ^^XHC1.PCHC)

}

Method (XHCD, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (One, ^^XHC1.PDSS)

}

Store (One, ^^XHC1.PDHC)

Store (One, GI74)

}

Method (EHCA, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (Zero, ^^XHC1.PASS)

}

Store (Zero, ^^XHC1.PAHC)

}

Method (EHCB, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (Zero, ^^XHC1.PBSS)

}

Store (Zero, ^^XHC1.PBHC)

Store (Zero, GP60)

Store (Zero, GI60)

}

Method (EHCC, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (Zero, ^^XHC1.PCSS)

}

Store (Zero, ^^XHC1.PCHC)

}

Method (EHCD, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (Zero, ^^XHC1.PDSS)

}

Store (Zero, ^^XHC1.PDHC)

Store (Zero, GP74)

Store (Zero, GI74)

}

Device (RHUB)

{

Name (_ADR, Zero)

Device (PRT1)

{

Name (_ADR, One)

Name (_UPC, Package (0x04)

{

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Device (PRT1)

{

Name (_ADR, One)

Name (_UPC, Package (0x04)

{

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Method (_RMV, 0, NotSerialized)

{

Return (Zero)

}

Device (PRT2)

{

Name (_ADR, 0x02)

Name (_UPC, Package (0x04)

{

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Name (MUXS, "XHCB")

}

Device (PRT3)

{

Name (_ADR, 0x03)

Name (_UPC, Package (0x04)

{

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Name (MUXS, "XHCD")

}

Method (MBSD, 0, NotSerialized)

{

Return (One)

}

Name (_PRW, Package (0x02)

{

0x0D,

0x04

})

Method (_DSM, 4, NotSerialized)

{

If (OSDW ())

{

Store (Package (0x0B)

{

"AAPL,current-available",

0x0834,

"AAPL,current-extra",

0x0898,

"AAPL,current-extra-in-sleep",

0x0640,

"AAPL,max-port-current-in-sleep",

0x0834,

"AAPL,device-internal",

Zero,

Buffer (One)

{

0x00

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Return (Zero)

}

Method (XHCN, 0, NotSerialized)

{

Return (One)

}

Device (XHC1)

{

Name (_ADR, 0x00140000)

OperationRegion (XH1C, PCI_Config, 0xD0, 0x10)

Field (XH1C, ByteAcc, NoLock, Preserve)

{

PAHC, 1,

PBHC, 1,

PCHC, 1,

PDHC, 1,

Offset (0x08),

PASS, 1,

PBSS, 1,

PCSS, 1,

PDSS, 1

}

OperationRegion (XHC2, PCI_Config, 0x44, 0x04)

Field (XHC2, ByteAcc, NoLock, Preserve)

{

Offset (0x01),

MIAI, 2

}

Name (_PRW, Package (0x02)

{

0x0D,

0x04

})

Method (_DSM, 4, NotSerialized)

{

If (OSDW ())

{

Store (Package (0x0B)

{

"AAPL,current-available",

0x0834,

"AAPL,current-extra",

0x0898,

"AAPL,current-extra-in-sleep",

0x0640,

"AAPL,max-port-current-in-sleep",

0x0834,

"AAPL,device-internal",

Zero,

Buffer (One)

{

0x00

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Return (Zero)

}

Method (XHCA, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (One, PASS)

}

Store (One, PAHC)

}

Method (XHCB, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (One, PBSS)

}

Store (One, PBHC)

Store (One, GI60)

}

Method (XHCC, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (One, PCSS)

}

Store (One, PCHC)

}

Method (XHCD, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (One, PDSS)

}

Store (One, PDHC)

Store (One, GI74)

}

Method (EHCA, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (Zero, PASS)

}

Store (Zero, PAHC)

}

Method (EHCB, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (Zero, PBSS)

}

Store (Zero, PBHC)

Store (Zero, GP60)

Store (Zero, GI60)

}

Method (EHCC, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (Zero, PCSS)

}

Store (Zero, PCHC)

}

Method (EHCD, 0, NotSerialized)

{

If (LNot (OSDW ()))

{

Store (Zero, PDSS)

}

Store (Zero, PDHC)

Store (Zero, GP74)

Store (Zero, GI74)

}

Method (_INI, 0, NotSerialized)

{

If (OSDW ())

{

Store (Zero, MIAI)

}

If (LAnd (LGreaterEqual (OSYS, 0x07DC), LLess (OSYS, 0x2710)))

{

Store (One, PASS)

Store (One, PAHC)

Store (One, PBSS)

Store (One, PBHC)

Store (One, GI60)

Store (One, PCSS)

Store (One, PCHC)

Store (One, PDSS)

Store (One, PDHC)

Store (One, GI74)

}

Device (RHUB)

{

Name (_ADR, Zero)

Device (PRT1)

{

Name (_ADR, One)

Name (_UPC, Package (0x04)

{

0xFF,

0x03,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Name (MUXS, "EHCA")

}

Device (PRT2)

{

Name (_ADR, 0x02)

Name (_UPC, Package (0x04)

{

0xFF,

0x03,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Name (MUXS, "EHCB")

}

Device (PRT3)

{

Name (_ADR, 0x03)

Name (_UPC, Package (0x04)

{

Zero,

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Name (MUXS, "EHCC")

}

Device (PRT4)

{

Name (_ADR, 0x04)

Name (_UPC, Package (0x04)

{

Zero,

0xFF,

Zero,

Zero

})

Name (_PLD, Package (0x01)

{

Buffer (0x10)

{

/* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

/* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00

}

})

Name (MUXS, "EHCD")

}

Method (MBSD, 0, NotSerialized)

{

Return (One)

}

Scope (_SB.PCI0)

{

Method (TGPE, 0, Serialized)

{

Notify (RP01, 0x02)

}

Method (DTBP, 0, Serialized)

{

If (LEqual (^RP01.LDIS, Zero))

{

Return (One)

}

Return (Zero)

}

Scope (RP01)

{

OperationRegion (A1E1, PCI_Config, 0x40, 0x40)

Field (A1E1, ByteAcc, NoLock, Preserve)

{

Offset (0x10),

, 4,

LDIS, 1

}

Device (UPSB)

{

Name (_ADR, Zero)

Method (_RMV, 0, NotSerialized)

{

Return (Zero)

}

Device (DSB0)

{

Name (_ADR, Zero)

Method (_RMV, 0, NotSerialized)

{

Return (Zero)

}

Device (NHI0)

{

Name (_ADR, Zero)

Name (_GPE, 0x1E)

Name (_STR, Unicode ("Thunderbolt"))

Method (_STA, 0, NotSerialized)

{

If (OSDW ())

{

Return (0x0F)

}

Return (0x0B)

}

Method (XDPG, 0, NotSerialized)

{

}

Method (XDPS, 1, Serialized)

{

}

Method (XRIP, 1, Serialized)

{

}

Method (XRIO, 1, Serialized)

{

}

Method (XRIL, 0, Serialized)

{

}

Method (SXIO, 1, Serialized)

{

}

Method (SXIL, 0, Serialized)

{

}

Method (SXLV, 1, Serialized)

{

}

Method (SXFP, 1, Serialized)

{

}

Method (_DSM, 4, NotSerialized)

{

If (OSDW ())

{

Store (Package (0x03)

{

"power-save",

One,

Buffer (One)

{

0x00

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Return (Zero)

}

Device (DSB1)

{

Name (_ADR, 0x00030000)

Name (_SUN, 0x05)

Method (_RMV, 0, NotSerialized)

{

Return (Zero)

}

Device (DSB2)

{

Name (_ADR, 0x00040000)

Name (_SUN, 0x06)

Method (_RMV, 0, NotSerialized)

{

Return (Zero)

}

Device (DSB3)

{

Name (_ADR, 0x00050000)

Name (_SUN, 0x07)

Method (_RMV, 0, NotSerialized)

{

Return (Zero)

}

Device (UPS0)

{

Name (_ADR, Zero)

Method (_RMV, 0, NotSerialized)

{

If (OSDW ())

{

Return (One)

}

Return (Zero)

}

Device (DSB3)

{

Name (_ADR, 0x00030000)

Method (_RMV, 0, NotSerialized)

{

If (OSDW ())

{

Return (One)

}

Return (Zero)

}

Device (DEV0)

{

Name (_ADR, Zero)

Method (_RMV, 0, NotSerialized)

{

If (OSDW ())

{

Return (One)

}

Return (Zero)

}

Device (DSB4)

{

Name (_ADR, 0x00060000)

Name (_SUN, 0x08)

Method (_RMV, 0, NotSerialized)

{

Return (Zero)

}

Method (_DSM, 4, NotSerialized)

{

If (OSDW ())

{

If (LEqual (Arg0, Buffer (0x10)

{

/* 0000 */ 0xC6, 0xB7, 0xB5, 0xA0, 0x18, 0x13, 0x1C, 0x44,

/* 0008 */ 0xB0, 0xC9, 0xFE, 0x69, 0x5E, 0xAF, 0x94, 0x9B

}))

{

Store (Package (0x02)

{

"PCI-Thunderbolt",

One

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Return (Zero)

}

Scope (_SB.PCI0)

{

Device (IGPU)

{

Name (_ADR, 0x00020000)

OperationRegion (GFXH, PCI_Config, Zero, 0x40)

Field (GFXH, ByteAcc, NoLock, Preserve)

{

VID0, 16,

DID0, 16

}

Method (_DSM, 4, NotSerialized)

{

If (OSDW ())

{

If (LNotEqual (And (VID0, 0xFFFF), 0xFFFF))

{

Store (Package (0x02)

{

"hda-gfx",

Buffer (0x0A)

{

"onboard-1"

}

}, Local0)

DTGP (Arg2, RefOf (Local0))

Return (Local0)

}

Return (Zero)

}

Method (PCPC, 0, NotSerialized)

{

}

Method (PAPR, 0, NotSerialized)

{

Return (Zero)

}

Method (_DOS, 1, NotSerialized)

{

Store (And (Arg0, 0x07), DSEN)

If (LEqual (And (Arg0, 0x03), Zero))

{

If (CondRefOf (HDOS))

{

HDOS ()

}

Method (_DOD, 0, Serialized)

{

If (CondRefOf (IDAB)) {}

Else

{

Store (Zero, NDID)

If (LNotEqual (DIDL, Zero))

{

Store (SDDL (DIDL), DID1)

}

If (LNotEqual (DDL2, Zero))

{

Store (SDDL (DDL2), DID2)

}

If (LNotEqual (DDL3, Zero))

{

Store (SDDL (DDL3), DID3)

}

If (LNotEqual (DDL4, Zero))

{

Store (SDDL (DDL4), DID4)

}

If (LNotEqual (DDL5, Zero))

{

Store (SDDL (DDL5), DID5)

}

If (LNotEqual (DDL6, Zero))

{

Store (SDDL (DDL6), DID6)

}

If (LNotEqual (DDL7, Zero))

{

Store (SDDL (DDL7), DID7)

}

If (LNotEqual (DDL8, Zero))

{

Store (SDDL (DDL8), DID8)

}

If (LEqual (NDID, One))

{

Name (TMP1, Package (0x01)

{

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP1, Zero))

Return (TMP1)

}

If (LEqual (NDID, 0x02))

{

Name (TMP2, Package (0x02)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP2, Zero))

Store (Or (0x00010000, DID2), Index (TMP2, One))

Return (TMP2)

}

If (LEqual (NDID, 0x03))

{

Name (TMP3, Package (0x03)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP3, Zero))

Store (Or (0x00010000, DID2), Index (TMP3, One))

Store (Or (0x00010000, DID3), Index (TMP3, 0x02))

Return (TMP3)

}

If (LEqual (NDID, 0x04))

{

Name (TMP4, Package (0x04)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP4, Zero))

Store (Or (0x00010000, DID2), Index (TMP4, One))

Store (Or (0x00010000, DID3), Index (TMP4, 0x02))

Store (Or (0x00010000, DID4), Index (TMP4, 0x03))

Return (TMP4)

}

If (LEqual (NDID, 0x05))

{

Name (TMP5, Package (0x05)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP5, Zero))

Store (Or (0x00010000, DID2), Index (TMP5, One))

Store (Or (0x00010000, DID3), Index (TMP5, 0x02))

Store (Or (0x00010000, DID4), Index (TMP5, 0x03))

Store (Or (0x00010000, DID5), Index (TMP5, 0x04))

Return (TMP5)

}

If (LEqual (NDID, 0x06))

{

Name (TMP6, Package (0x06)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP6, Zero))

Store (Or (0x00010000, DID2), Index (TMP6, One))

Store (Or (0x00010000, DID3), Index (TMP6, 0x02))

Store (Or (0x00010000, DID4), Index (TMP6, 0x03))

Store (Or (0x00010000, DID5), Index (TMP6, 0x04))

Store (Or (0x00010000, DID6), Index (TMP6, 0x05))

Return (TMP6)

}

If (LEqual (NDID, 0x07))

{

Name (TMP7, Package (0x07)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP7, Zero))

Store (Or (0x00010000, DID2), Index (TMP7, One))

Store (Or (0x00010000, DID3), Index (TMP7, 0x02))

Store (Or (0x00010000, DID4), Index (TMP7, 0x03))

Store (Or (0x00010000, DID5), Index (TMP7, 0x04))

Store (Or (0x00010000, DID6), Index (TMP7, 0x05))

Store (Or (0x00010000, DID7), Index (TMP7, 0x06))

Return (TMP7)

}

If (LEqual (NDID, 0x08))

{

Name (TMP8, Package (0x08)

{

0xFFFFFFFF,

0xFFFFFFFF

})

Store (Or (0x00010000, DID1), Index (TMP8, Zero))

Store (Or (0x00010000, DID2), Index (TMP8, One))

Store (Or (0x00010000, DID3), Index (TMP8, 0x02))

Store (Or (0x00010000, DID4), Index (TMP8, 0x03))

Store (Or (0x00010000, DID5), Index (TMP8, 0x04))

Store (Or (0x00010000, DID6), Index (TMP8, 0x05))

Store (Or (0x00010000, DID7), Index (TMP8, 0x06))

Store (Or (0x00010000, DID8), Index (TMP8, 0x07))

Return (TMP8)

}

Return (Package (0x01)

{

0x0400

})

}

Device (DD01)

{

Method (_ADR, 0, Serialized)

{

If (LEqual (DID1, Zero))

{

Return (One)

}

Else

{

Return (And (0xFFFF, DID1))

}

Method (_DCS, 0, NotSerialized)

{

Return (CDDS (DID1))

}

Method (_DGS, 0, NotSerialized)

{

If (CondRefOf (SNXD))

{

Return (NXD1)

}

Return (NDDS (DID1))

}

Method (_DSS, 1, NotSerialized)

{

If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))

{

Store (NSTE, CSTE)

}

Device (DD02)

{

Method (_ADR, 0, Serialized)

{

If (LEqual (DID2, Zero))

{

Return (0x02)

}

Else

{

Return (And (0xFFFF, DID2))

}

Method (_DCS, 0, NotSerialized)

{

If (LEqual (LIDS, Zero))

{

Return (Zero)

}

Return (CDDS (DID2))

}

Method (_DGS, 0, NotSerialized)

{

If (CondRefOf (SNXD))

{

Return (NXD2)

}

Return (NDDS (DID2))

}

Method (_DSS, 1, NotSerialized)

{

If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))

{

Store (NSTE, CSTE)

}

Method (_BCL, 0, NotSerialized)

{

Return (Package (0x12)

{

0x50,

0x2F,

One,

0x04,

0x06,

0x09,

0x0E,

0x13,

0x1A,

0x21,

0x28,

0x2E,

0x34,

0x3A,

0x41,

0x47,

0x4E,

0x55

})

}

Method (_BCM, 1, NotSerialized)

{

If (LAnd (LGreaterEqual (Arg0, Zero), LLessEqual (Arg0, 0x64)))

{

Store (Arg0, BRTL)

AINT (One, Arg0)

}

Return (Zero)

}

Method (_BQC, 0, NotSerialized)

{

Return (BRTL)

}

Device (DD03)

{

Method (_ADR, 0, Serialized)

{

If (LEqual (DID3, Zero))

{

Return (0x03)

}

Else

{

Return (And (0xFFFF, DID3))

}

Method (_DCS, 0, NotSerialized)

{

If (LEqual (DID3, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID3))

}

Method (_DGS, 0, NotSerialized)

{

If (CondRefOf (SNXD))

{

Return (NXD3)

}

Return (NDDS (DID3))

}

Method (_DSS, 1, NotSerialized)

{

If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))

{

Store (NSTE, CSTE)

}

Device (DD04)

{

Method (_ADR, 0, Serialized)

{

If (LEqual (DID4, Zero))

{

Return (0x04)

}

Else

{

Return (And (0xFFFF, DID4))

}

Method (_DCS, 0, NotSerialized)

{

If (LEqual (DID4, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID4))

}

Method (_DGS, 0, NotSerialized)

{

If (CondRefOf (SNXD))

{

Return (NXD4)

}

Return (NDDS (DID4))

}

Method (_DSS, 1, NotSerialized)

{

If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))

{

Store (NSTE, CSTE)

}

Device (DD05)

{

Method (_ADR, 0, Serialized)

{

If (LEqual (DID5, Zero))

{

Return (0x05)

}

Else

{

Return (And (0xFFFF, DID5))

}

Method (_DCS, 0, NotSerialized)

{

If (LEqual (DID5, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID5))

}

Method (_DGS, 0, NotSerialized)

{

If (CondRefOf (SNXD))

{

Return (NXD5)

}

Return (NDDS (DID5))

}

Method (_DSS, 1, NotSerialized)

{

If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))

{

Store (NSTE, CSTE)

}

Device (DD06)

{

Method (_ADR, 0, Serialized)

{

If (LEqual (DID6, Zero))

{

Return (0x06)

}

Else

{

Return (And (0xFFFF, DID6))

}

Method (_DCS, 0, NotSerialized)

{

If (LEqual (DID6, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID6))

}

Method (_DGS, 0, NotSerialized)

{

If (CondRefOf (SNXD))

{

Return (NXD6)

}

Return (NDDS (DID6))

}

Method (_DSS, 1, NotSerialized)

{

If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))

{

Store (NSTE, CSTE)

}

Device (DD07)

{

Method (_ADR, 0, Serialized)

{

If (LEqual (DID7, Zero))

{

Return (0x07)

}

Else

{

Return (And (0xFFFF, DID7))

}

Method (_DCS, 0, NotSerialized)

{

If (LEqual (DID7, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID7))

}

Method (_DGS, 0, NotSerialized)

{

If (CondRefOf (SNXD))

{

Return (NXD7)

}

Return (NDDS (DID7))

}

Method (_DSS, 1, NotSerialized)

{

If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))

{

Store (NSTE, CSTE)

}

Device (DD08)

{

Method (_ADR, 0, Serialized)

{

If (LEqual (DID8, Zero))

{

Return (0x08)

}

Else

{

Return (And (0xFFFF, DID8))

}

Method (_DCS, 0, NotSerialized)

{

If (LEqual (DID8, Zero))

{

Return (0x0B)

}

Else

{

Return (CDDS (DID8))

}

Method (_DGS, 0, NotSerialized)

{

If (CondRefOf (SNXD))

{

Return (NXD8)

}

Return (NDDS (DID8))

}

Method (_DSS, 1, NotSerialized)

{

If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))

{

Store (NSTE, CSTE)

}

Method (SDDL, 1, NotSerialized)

{

Increment (NDID)

Store (And (Arg0, 0x0F0F), Local0)

Or (0x80000000, Local0, Local1)

If (LEqual (DIDL, Local0))

{

Return (Local1)

}

If (LEqual (DDL2, Local0))

{

Return (Local1)

}

If (LEqual (DDL3, Local0))

{

Return (Local1)

}

If (LEqual (DDL4, Local0))

{

Return (Local1)

}

If (LEqual (DDL5, Local0))

{

Return (Local1)

}

If (LEqual (DDL6, Local0))

{

Return (Local1)

}

If (LEqual (DDL7, Local0))

{

Return (Local1)

}

If (LEqual (DDL8, Local0))

{

Return (Local1)

}

Return (Zero)

}

Method (CDDS, 1, NotSerialized)

{

Store (And (Arg0, 0x0F0F), Local0)

If (LEqual (Zero, Local0))

{

Return (0x1D)

}

If (LEqual (CADL, Local0))

{

Return (0x1F)

}

If (LEqual (CAL2, Local0))

{

Return (0x1F)

}

If (LEqual (CAL3, Local0))

{

Return (0x1F)

}

If (LEqual (CAL4, Local0))

{

Return (0x1F)

}

If (LEqual (CAL5, Local0))

{

Return (0x1F)

}

If (LEqual (CAL6, Local0))

{

Return (0x1F)

}

If (LEqual (CAL7, Local0))

{

Return (0x1F)

}

If (LEqual (CAL8, Local0))

{

Return (0x1F)

}

Return (0x1D)

}

Method (NDDS, 1, NotSerialized)

{

Store (And (Arg0, 0x0F0F), Local0)

If (LEqual (Zero, Local0))

{

Return (Zero)

}

If (LEqual (NADL, Local0))

{

Return (One)

}

If (LEqual (NDL2, Local0))

{

Return (One)

}

If (LEqual (NDL3, Local0))

{

Return (One)

}

If (LEqual (NDL4, Local0))

{

Return (One)

}

If (LEqual (NDL5, Local0))

{

Return (One)

}

If (LEqual (NDL6, Local0))

{

Return (One)

}

If (LEqual (NDL7, Local0))

{

Return (One)

}

If (LEqual (NDL8, Local0))

{

Return (One)

}

Return (Zero)

}

Scope (^^PCI0)

{

OperationRegion (MCHP, PCI_Config, 0x40, 0xC0)

Field (MCHP, AnyAcc, NoLock, Preserve)

{

Offset (0x60),

TASM, 10,

Offset (0x62)

}

OperationRegion (IGDP, PCI_Config, 0x40, 0xC0)

Field (IGDP, AnyAcc, NoLock, Preserve)

{

Offset (0x12),

, 1,

GIVD, 1,

, 2,

GUMA, 3,

Offset (0x14),

, 4,

GMFN, 1,

Offset (0x18),

Offset (0xA4),

ASLE, 8,

Offset (0xA8),

GSSE, 1,

GSSB, 14,

GSES, 1,

Offset (0xB0),

, 12,

CDVL, 1,

Offset (0xB2),

Offset (0xB5),

LBPC, 8,

Offset (0xBC),

ASLS, 32

}

OperationRegion (IGDM, SystemMemory, ASLB, 0x2000)

Field (IGDM, AnyAcc, NoLock, Preserve)

{

SIGN, 128,

SIZE, 32,

OVER, 32,

SVER, 256,

VVER, 128,

GVER, 128,

MBOX, 32,

DMOD, 32,

Offset (0x100),

DRDY, 32,

CSTS, 32,

CEVT, 32,

Offset (0x120),

DIDL, 32,

DDL2, 32,

DDL3, 32,

DDL4, 32,

DDL5, 32,

DDL6, 32,

DDL7, 32,

DDL8, 32,

CPDL, 32,

CPL2, 32,

CPL3, 32,

CPL4, 32,

CPL5, 32,

CPL6, 32,

CPL7, 32,

CPL8, 32,

CADL, 32,

CAL2, 32,

CAL3, 32,

CAL4, 32,

CAL5, 32,

CAL6, 32,

CAL7, 32,

CAL8, 32,

NADL, 32,

NDL2, 32,

NDL3, 32,

NDL4, 32,

NDL5, 32,

NDL6, 32,

NDL7, 32,

NDL8, 32,

ASLP, 32,

TIDX, 32,

CHPD, 32,

CLID, 32,

CDCK, 32,

SXSW, 32,

EVTS, 32,

CNOT, 32,

NRDY, 32,

Offset (0x200),

SCIE, 1,

GEFC, 4,

GXFC, 3,

GESF, 8,

Offset (0x204),

PARM, 32,

DSLP, 32,

Offset (0x300),

ARDY, 32,

ASLC, 32,

TCHE, 32,

ALSI, 32,

BCLP, 32,

PFIT, 32,

CBLV, 32,

BCLM, 320,

CPFM, 32,

EPFM, 32,

PLUT, 592,

PFMB, 32,

CCDV, 32,

PCFT, 32,

Offset (0x400),

GVD1, 49152,

PHED, 32,

BDDC, 2048

}

Name (DBTB, Package (0x15)

{

Zero,

0x07,

0x38,

0x01C0,

0x0E00,

0x3F,

0x01C7,

0x0E07,

0x01F8,

0x0E38,

0x0FC0,

Zero,

0x7000,

0x7007,

0x7038,

0x71C0,

0x7E00

})

Name (CDCT, Package (0x05)

{

Package (0x02)

{

0xE4,

0x0140

Package (0x02)

{

0xDE,

0x014D

Package (0x02)

{

0xDE,

0x014D

Package (0x02)

{

Zero,

Zero

Package (0x02)

{

0xDE,

0x014D

}

})

Name (SUCC, One)

Name (NVLD, 0x02)

Name (CRIT, 0x04)

Name (NCRT, 0x06)

Method (GSCI, 0, Serialized)

{

Method (GBDA, 0, Serialized)

{

If (LEqual (GESF, Zero))

{

Store (0x0679, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, One))

{

Store (0x0240, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x04))

{

And (PARM, 0xEFFF0000, PARM)

And (PARM, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10),

PARM)

Or (IBTT, PARM, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x05))

{

Store (IPSC, PARM)

Or (PARM, ShiftLeft (IPAT, 0x08), PARM)

Add (PARM, 0x0100, PARM)

Or (PARM, ShiftLeft (LIDS, 0x10), PARM)

Add (PARM, 0x00010000, PARM)

Or (PARM, ShiftLeft (IBIA, 0x14), PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x06))

{

Store (ITVF, PARM)

Or (PARM, ShiftLeft (ITVM, 0x04), PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x07))

{

Store (GIVD, PARM)

XOr (PARM, One, PARM)

Or (PARM, ShiftLeft (GMFN, One), PARM)

Or (PARM, 0x1800, PARM)

Or (PARM, ShiftLeft (IDMS, 0x11), PARM)

Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), CDVL

)), 0x15), PARM, PARM)

Store (One, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x0A))

{

Store (Zero, PARM)

If (ISSC)

{

Or (PARM, 0x03, PARM)

}

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x0B))

{

Store (KSV0, PARM)

Store (KSV1, GESF)

Return (SUCC)

}

Store (Zero, GESF)

Return (CRIT)

}

Method (SBCB, 0, Serialized)

{

If (LEqual (GESF, Zero))

{

Store (Zero, PARM)

Store (0x000F87FD, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, One))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x03))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x04))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x05))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x06))

{

Store (And (PARM, 0x0F), ITVF)

Store (ShiftRight (And (PARM, 0xF0), 0x04), ITVM)

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x07))

{

If (LEqual (PARM, Zero))

{

Store (CLID, Local0)

If (And (0x80000000, Local0))

{

And (CLID, 0x0F, CLID)

GLID (CLID)

}

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x08))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x09))

{

And (PARM, 0xFF, IBTT)

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x0A))

{

And (PARM, 0xFF, IPSC)

If (And (ShiftRight (PARM, 0x08), 0xFF))

{

And (ShiftRight (PARM, 0x08), 0xFF, IPAT)

Decrement (IPAT)

}

And (ShiftRight (PARM, 0x14), 0x07, IBIA)

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x0B))

{

And (ShiftRight (PARM, One), One, IF1E)

If (And (PARM, 0x0001E000))

{

And (ShiftRight (PARM, 0x0D), 0x0F, IDMS)

}

Else

{

And (ShiftRight (PARM, 0x11), 0x0F, IDMS)

}

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x10))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x11))

{

Store (ShiftLeft (LIDS, 0x08), PARM)

Add (PARM, 0x0100, PARM)

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GESF, 0x12))

{

If (And (PARM, One))

{

If (LEqual (ShiftRight (PARM, One), One))

{

Store (One, ISSC)

}

Else

{

Store (Zero, GESF)

Return (CRIT)

}

Else

{

Store (Zero, ISSC)

}

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x13))

{

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

If (LEqual (GESF, 0x14))

{

And (PARM, 0x0F, PAVP)

Store (Zero, GESF)

Store (Zero, PARM)

Return (SUCC)

}

Store (Zero, GESF)

Return (SUCC)

}

If (LEqual (GEFC, 0x04))

{

Store (GBDA (), GXFC)

}

If (LEqual (GEFC, 0x06))

{

Store (SBCB (), GXFC)

}

Store (Zero, GEFC)

Store (One, SCIS)

Store (Zero, GSSE)

Store (Zero, SCIE)

Return (Zero)

}

Method (PDRD, 0, NotSerialized)

{

If (LNot (DRDY))

{

Sleep (ASLP)

}

Return (LNot (DRDY))

}

Method (PSTS, 0, NotSerialized)

{

If (LGreater (CSTS, 0x02))

{

Sleep (ASLP)

}

Return (LEqual (CSTS, 0x03))

}

Method (GNOT, 2, NotSerialized)

{

If (PDRD ())

{

Return (One)

}

Store (Arg0, CEVT)

Store (0x03, CSTS)

If (LAnd (LEqual (CHPD, Zero), LEqual (Arg1, Zero)))

{

If (LOr (LGreater (OSYS, 0x07D0), LLess (OSYS, 0x07D6)))

{

Notify (PCI0, Arg1)

}

Else

{

Notify (IGPU, Arg1)

}

If (CondRefOf (HNOT))

{

HNOT (Arg0)

}

Else

{

Notify (IGPU, 0x80)

}

Return (Zero)

}

Method (GHDS, 1, NotSerialized)

{

Store (Arg0, TIDX)

Return (GNOT (One, Zero))

}

Method (GLID, 1, NotSerialized)

{

If (LEqual (Arg0, One))

{

Store (0x03, CLID)

}

Else

{

Store (Arg0, CLID)

}

Return (GNOT (0x02, Zero))

}

Method (GDCK, 1, NotSerialized)

{

Store (Arg0, CDCK)

Return (GNOT (0x04, Zero))

}

Method (PARD, 0, NotSerialized)

{

If (LNot (ARDY))

{

Sleep (ASLP)

}

Return (LNot (ARDY))

}

Method (AINT, 2, NotSerialized)

{

If (LNot (And (TCHE, ShiftLeft (One, Arg0))))

{

Return (One)

}

If (PARD ())

{

Return (One)

}

If (LEqual (Arg0, 0x02))

{

If (CPFM)

{

And (CPFM, 0x0F, Local0)

And (EPFM, 0x0F, Local1)

If (LEqual (Local0, One))

{

If (And (Local1, 0x06))

{

Store (0x06, PFIT)

}

Else

{

If (And (Local1, 0x08))

{

Store (0x08, PFIT)

}

Else

{

Store (One, PFIT)

}

If (LEqual (Local0, 0x06))

{

If (And (Local1, 0x08))

{

Store (0x08, PFIT)

}

Else

{

If (And (Local1, One))

{

Store (One, PFIT)

}

Else

{

Store (0x06, PFIT)

}

If (LEqual (Local0, 0x08))

{

If (And (Local1, One))

{

Store (One, PFIT)

}

Else

{

If (And (Local1, 0x06))

{

Store (0x06, PFIT)

}

Else

{

Store (0x08, PFIT)

}

Else

{

XOr (PFIT, 0x07, PFIT)

}

Or (PFIT, 0x80000000, PFIT)

Store (0x04, ASLC)

}

Else

{

If (LEqual (Arg0, One))

{

Store (Divide (Multiply (Arg1, 0xFF), 0x64, ), BCLP)

Or (BCLP, 0x80000000, BCLP)

Store (0x02, ASLC)

}

Else

{

If (LEqual (Arg0, Zero))

{

Store (Arg1, ALSI)

Store (One, ASLC)

}

Else

{

Return (One)

}

Store (One, ASLE)

Return (Zero)

}

Method (SCIP, 0, NotSerialized)

{

If (LNotEqual (OVER, Zero))

{

Return (LNot (GSMI))

}

Return (Zero)

}

Device (^^MEM2)

{

Name (_HID, EisaId ("PNP0C01"))

Name (_UID, 0x02)

Name (CRS, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0x20000000, // Address Base

0x00200000, // Address Length

)

Memory32Fixed (ReadWrite,

0x40000000, // Address Base

0x00200000, // Address Length

)

})

Method (_STA, 0, NotSerialized)

{

If (IGDS)

{

Store (0x03, ^^PCI0.IGPU.CLID)

Return (0x0F)

}

Return (Zero)

}

Method (_CRS, 0, NotSerialized)

{

Return (CRS)

}

Scope (_SB.PCI0)

{

Name (SLIC, Buffer (0x9E)

{

})

Device (WMI1)

{

Name (_HID, "PNP0C14")

Name (_UID, "MXM2")

Name (_WDG, Buffer (0x14)

{

/* 0000 */ 0x3C, 0x5C, 0xCB, 0xF6, 0xAE, 0x9C, 0xBD, 0x4E,

/* 0008 */ 0xB5, 0x77, 0x93, 0x1E, 0xA3, 0x2A, 0x2C, 0xC0,

/* 0010 */ 0x4D, 0x58, 0x01, 0x02

})

Method (_STA, 0, NotSerialized)

{

If (OSDW ())

{

Return (Zero)

}

Return (0x0F)

}

Method (WMMX, 3, NotSerialized)

{

CreateDWordField (Arg2, Zero, FUNC)

If (LEqual (FUNC, 0x41494C53))

{

Return (SLIC)

}

Return (Zero)

}

Scope (_PR)

{

Processor (CPU0, 0x01, 0x00000410, 0x06) {}

Processor (CPU1, 0x02, 0x00000410, 0x06) {}

Processor (CPU2, 0x03, 0x00000410, 0x06) {}

Processor (CPU3, 0x04, 0x00000410, 0x06) {}

Processor (CPU4, 0x05, 0x00000410, 0x06) {}

Processor (CPU5, 0x06, 0x00000410, 0x06) {}

Processor (CPU6, 0x07, 0x00000410, 0x06) {}

Processor (CPU7, 0x08, 0x00000410, 0x06) {}

}

Mutex (MUTX, 0x00)

OperationRegion (PRT0, SystemIO, 0x80, 0x04)

Field (PRT0, DWordAcc, Lock, Preserve)

{

P80H, 32

}

OperationRegion (PLMT, SystemIO, 0x0310, 0x0A)

Field (PLMT, WordAcc, Lock, Preserve)

{

CPLT, 8,

IGPS, 8,

MPLT, 8,

CFIL, 8,

EGPS, 8

}

Method (P8XH, 2, Serialized)

{

If (LEqual (Arg0, Zero))

{

Store (Or (And (P80D, 0xFFFFFF00), Arg1), P80D)

}

If (LEqual (Arg0, One))

{

Store (Or (And (P80D, 0xFFFF00FF), ShiftLeft (Arg1, 0x08)

), P80D)

}

If (LEqual (Arg0, 0x02))

{

Store (Or (And (P80D, 0xFF00FFFF), ShiftLeft (Arg1, 0x10)

), P80D)

}

If (LEqual (Arg0, 0x03))

{

Store (Or (And (P80D, 0x00FFFFFF), ShiftLeft (Arg1, 0x18)

), P80D)

}

Store (P80D, P80H)

}

OperationRegion (SPRT, SystemIO, 0xB2, 0x02)

Field (SPRT, ByteAcc, Lock, Preserve)

{

SSMP, 8,

SSMY, 8

}

Method (_PIC, 1, NotSerialized)

{

Store (Arg0, GPIC)

Store (Arg0, PICM)

}

Method (GETB, 3, Serialized)

{

Multiply (Arg0, 0x08, Local0)

Multiply (Arg1, 0x08, Local1)

CreateField (Arg2, Local0, Local1, TBF3)

Return (TBF3)

}

Method (PNOT, 0, Serialized)

{

If (LGreater (TCNT, One))

{

If (And (PDC0, 0x08))

{

Notify (\_PR.CPU0, 0x80)

If (And (PDC0, 0x10))

{

Notify (\_PR.CPU0, 0x81)

}

If (And (PDC1, 0x08))

{

Notify (\_PR.CPU1, 0x80)

If (And (PDC1, 0x10))

{

Notify (\_PR.CPU1, 0x81)

}

If (And (PDC2, 0x08))

{

Notify (\_PR.CPU2, 0x80)

If (And (PDC2, 0x10))

{

Notify (\_PR.CPU2, 0x81)

}

If (And (PDC3, 0x08))

{

Notify (\_PR.CPU3, 0x80)

If (And (PDC3, 0x10))

{

Notify (\_PR.CPU3, 0x81)

}

If (And (PDC4, 0x08))

{

Notify (\_PR.CPU4, 0x80)

If (And (PDC4, 0x10))

{

Notify (\_PR.CPU4, 0x81)

}

If (And (PDC5, 0x08))

{

Notify (\_PR.CPU5, 0x80)

If (And (PDC5, 0x10))

{

Notify (\_PR.CPU5, 0x81)

}

If (And (PDC6, 0x08))

{

Notify (\_PR.CPU6, 0x80)

If (And (PDC6, 0x10))

{

Notify (\_PR.CPU6, 0x81)

}

If (And (PDC7, 0x08))

{

Notify (\_PR.CPU7, 0x80)

If (And (PDC7, 0x10))

{

Notify (\_PR.CPU7, 0x81)

}

Else

{

Notify (\_PR.CPU0, 0x80)

Notify (\_PR.CPU0, 0x81)

}

Method (TRAP, 2, Serialized)

{

Store (Arg1, SMIF)

If (LEqual (Arg0, TRTP))

{

Store (Zero, TRP0)

}

If (LEqual (Arg0, TRTD))

{

Store (Arg1, DTSF)

Store (Zero, TRPD)

Return (DTSF)

}

If (LEqual (Arg0, TRTI))

{

Store (Zero, TRPH)

}

Return (SMIF)

}

Scope (_SB)

{

Method (_INI, 0, NotSerialized)

{

PINI ()

}

Scope (_SB.PCI0)

{

Method (_INI, 0, NotSerialized)

{

Store (0x07D0, OSYS)

If (CondRefOf (_OSI, Local0))

{

If (_OSI ("Darwin"))

{

Store (0x2710, OSYS)

}

If (_OSI ("Windows 2006"))

{

Store (0x07D6, OSYS)

}

If (_OSI ("Windows 2009"))

{

Store (0x07D9, OSYS)

}

If (_OSI ("Windows 2012"))

{

Store (0x07DC, OSYS)

}

Scope (\)

{

Name (PICM, Zero)

Method (OSDW, 0, NotSerialized)

{

If (CondRefOf (_OSI, Local0))

{

If (_OSI ("Darwin"))

{

Return (One)

}

Return (Zero)

}

Method (PINI, 0, NotSerialized)

{

Store (0x07D0, OSYS)

If (CondRefOf (_OSI, Local0))

{

If (_OSI ("Darwin"))

{

Store (0x2710, OSYS)

}

Else

{

If (_OSI ("Windows 2006"))

{

Store (0x07D6, OSYS)

}

Else

{

If (_OSI ("Windows 2009"))

{

Store (0x07D9, OSYS)

}

Else

{

If (_OSI ("Windows 2012"))

{

Store (0x07DC, OSYS)

}

Else

{

Store (0x07D0, OSYS)

}

Scope (_SB.PCI0)

{

Device (PDRC)

{

Name (_HID, EisaId ("PNP0C02"))

Name (_UID, One)

Name (BUF0, ResourceTemplate ()

{

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00004000, // Address Length

_Y1C)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00008000, // Address Length

_Y1E)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00001000, // Address Length

_Y1F)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00001000, // Address Length

_Y20)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00000000, // Address Length

_Y21)

Memory32Fixed (ReadWrite,

0xFED20000, // Address Base

0x00020000, // Address Length

)

Memory32Fixed (ReadOnly,

0xFED90000, // Address Base

0x00004000, // Address Length

)

Memory32Fixed (ReadWrite,

0xFED45000, // Address Base

0x0004B000, // Address Length

)

Memory32Fixed (ReadOnly,

0xFF000000, // Address Base

0x01000000, // Address Length

)

Memory32Fixed (ReadOnly,

0xFEE00000, // Address Base

0x00100000, // Address Length

)

Memory32Fixed (ReadWrite,

0x00000000, // Address Base

0x00001000, // Address Length

_Y1D)

})

Method (_CRS, 0, Serialized)

{

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1C._BAS, RBR0)

ShiftLeft (^^LPCB.RCBA, 0x0E, RBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1D._BAS, TBR0)

Store (TBAB, TBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1D._LEN, TBLN)

If (LEqual (TBAB, Zero))

{

Store (Zero, TBLN)

}

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1E._BAS, MBR0)

ShiftLeft (MHBR, 0x0F, MBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y1F._BAS, DBR0)

ShiftLeft (DIBR, 0x0C, DBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y20._BAS, EBR0)

ShiftLeft (EPBR, 0x0C, EBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y21._BAS, XBR0)

ShiftLeft (PXBR, 0x1A, XBR0)

CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y21._LEN, XSZ0)

ShiftRight (0x10000000, PXSZ, XSZ0)

Return (BUF0)

}

Scope (\)

{

OperationRegion (IO_T, SystemIO, 0x0200, 0x10)

Field (IO_T, ByteAcc, NoLock, Preserve)

{

TRPI, 16,

Offset (0x04),

Offset (0x06),

Offset (0x08),

TRP0, 8,

Offset (0x0A),

Offset (0x0B),

Offset (0x0C),

Offset (0x0D),

Offset (0x0E),

Offset (0x0F),

Offset (0x10)

}

OperationRegion (IO_D, SystemIO, 0x0810, 0x04)

Field (IO_D, ByteAcc, NoLock, Preserve)

{

TRPD, 8

}

OperationRegion (IO_H, SystemIO, 0x1000, 0x04)

Field (IO_H, ByteAcc, NoLock, Preserve)

{

TRPH, 8

}

OperationRegion (PMIO, SystemIO, PMBS, 0x80)

Field (PMIO, ByteAcc, NoLock, Preserve)

{

Offset (0x20),

, 1,

SPST, 1,

, 3,

, 6,

, 1,

Offset (0x22),

, 9,

GS09, 1,

, 3,

GS13, 1,

Offset (0x24),

, 3,

, 1,

Offset (0x28),

, 1,

, 2,

, 3,

, 6,

, 1,

Offset (0x2A),

, 9,

GE09, 1,

, 3,

GE13, 1,

Offset (0x2C),

, 3,

, 1,

Offset (0x30),

Offset (0x42),

, 1,

GPEC, 1,

, 1,

Offset (0x43),

Offset (0x64),

, 4,

, 3,

, 2,

SCIS, 1,

, 4,

Offset (0x66)

}

OperationRegion (GPIO, SystemIO, GPBS, 0x64)

Field (GPIO, ByteAcc, NoLock, Preserve)

{

, 5,

GU05, 1,

Offset (0x01),

GUV1, 8,

GUV2, 8,

GUV3, 8,

GD00, 4,

GD04, 1,

, 5,

GD10, 1,

, 1,

GD12, 1,

, 1,

GD14, 1,

Offset (0x07),

GD24, 1,

Offset (0x08),

Offset (0x0C),

, 3,

GP03, 1,

GP04, 1,

GP05, 1,

GP06, 1,

GP07, 1,

GP08, 1,

GP09, 1,

GP10, 1,

GP11, 1,

GP12, 1,

GP13, 1,

GP14, 1,

GP15, 1,

GP16, 1,

GP17, 1,

GP18, 1,

GP19, 1,

GP20, 1,

GP21, 1,

GP22, 1,

GP23, 1,

GP24, 1,

, 2,

GP27, 1,

GP28, 1,

Offset (0x10),

Offset (0x18),

GB00, 8,

GB01, 8,

GB02, 8,

GB03, 8,

Offset (0x2C),

, 3,

GI03, 1,

GI04, 1,

GI05, 1,

GI06, 1,

Offset (0x2D),

GI08, 1,

GI09, 1,

GI10, 1,

GI11, 1,

Offset (0x2E),

GIV2, 8,

GIV3, 8,

GUV4, 8,

GUV5, 8,

GUV6, 8,

GUV7, 8,

GIO4, 8,

GI40, 1,

GI41, 1,

GI42, 1,

, 3,

GI46, 1,

Offset (0x36),

GIO6, 6,

GD54, 1,

, 4,

GI59, 1,

GI60, 1,

Offset (0x38),

, 4,

GP36, 1,

Offset (0x39),

GP40, 1,

GP41, 1,

GP42, 1,

, 2,

GP45, 1,

GP46, 1,

Offset (0x3A),

GP48, 1,

GP49, 1,

GL06, 4,

GP54, 1,

, 4,

GP59, 1,

GP60, 1,

Offset (0x3C),

Offset (0x40),

GUV8, 8,

GUV9, 8,

GUVA, 8,

GUVB, 8,

GIO8, 4,

GI68, 1,

GI69, 1,

GI70, 1,

GI71, 1,

GI72, 1,

GI73, 1,

GI74, 1,

GIO9, 4,

GIOA, 8,

GIOB, 8,

Offset (0x48),

GP64, 1,

, 3,

GP68, 1,

GP69, 1,

GL08, 2,

GP72, 1,

GP73, 1,

GP74, 1,

GL09, 5,

GL0A, 8,

GL0B, 8

}

OperationRegion (RCRB, SystemMemory, SRCB, 0x4000)

Field (RCRB, DWordAcc, Lock, Preserve)

{

Offset (0x1000),

Offset (0x3000),

Offset (0x3404),

HPAS, 2,

, 5,

HPAE, 1,

Offset (0x3418),

, 1,

SATD, 1,

SMBD, 1,

HDAD, 1,

, 2,

UH6D, 1,

UH1D, 1,

UH2D, 1,

UH3D, 1,

UH4D, 1,

UH5D, 1,

Offset (0x341A),

RP1D, 1,

RP2D, 1,

RP3D, 1,

RP4D, 1,

RP5D, 1,

RP6D, 1,

RP7D, 1,

RP8D, 1,

, 4,

UH7D, 1

}

Scope (_GPE)

{

Method (_E1E, 0, Serialized)

{

Name (TSNE, 0x03)

If (LNotEqual (TSNE, 0xFF))

{

If (LAnd (TSNE, One))

{

Store (TBSW, SSMP)

}

If (LAnd (TSNE, 0x02))

{

Notify (\_SB.PCI0.RP01, Zero)

}

Method (_L1D, 0, NotSerialized)

{

\_SB.PCI0.LPCB.SIOH ()

Notify (\_SB.PWRB, 0x02)

}

Method (_L06, 0, NotSerialized)

{

If (LAnd (\_SB.PCI0.IGPU.GSSE, LNot (GSMI)))

{

\_SB.PCI0.IGPU.GSCI ()

}

Method (_L07, 0, NotSerialized)

{

Store (0x20, \_SB.PCI0.SBUS.HSTS)

}

Method (_L09, 0, NotSerialized)

{

Notify (\_SB.PCI0.PEG0, 0x02)

Notify (\_SB.PCI0.PEG0.PXS1, 0x02)

Notify (\_SB.PCI0.PEG1, 0x02)

Notify (\_SB.PCI0.PEG1.PXS4, 0x02)

Notify (\_SB.PCI0.RP01, 0x02)

\_SB.PCI0.TGPE ()

Notify (\_SB.PCI0.RP05, 0x02)

Notify (\_SB.PCI0.RP05.GIGE, 0x02)

Notify (\_SB.PCI0.RP06, 0x02)

Notify (\_SB.PCI0.RP06.PXS2, 0x02)

Notify (\_SB.PCI0.RP07, 0x02)

Notify (\_SB.PCI0.RP07.PXS3, 0x02)

Notify (\_SB.PCI0.RP08, 0x02)

Notify (\_SB.PCI0.RP08.FWBR, 0x02)

}

Method (_L0D, 0, NotSerialized)

{

Notify (\_SB.PWRB, 0x02)

Notify (\_SB.PCI0.EHC1, 0x02)

Notify (\_SB.PCI0.EHC2, 0x02)

Notify (\_SB.PCI0.HDEF, 0x02)

}

Method (DTGP, 2, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Store (Buffer (One)

{

0x03

}, Arg1)

}

Name (_S0, Package (0x03)

{

Zero,

Zero

})

Name (_S3, Package (0x03)

{

0x05,

Zero

})

Name (_S4, Package (0x03)

{

0x06,

Zero

})

Name (_S5, Package (0x03)

{

0x07,

Zero

})

Method (_PTS, 1, NotSerialized)

{

Store (Zero, P80D)

P8XH (Zero, Arg0)

\_SB.PCI0.LPCB.SPTS (Arg0)

\_SB.PCI0.LPCB.SIOS (Arg0)

}

Method (_WAK, 1, NotSerialized)

{

P8XH (Zero, Zero)

\_SB.PCI0.LPCB.SWAK (Arg0)

\_SB.PCI0.LPCB.SIOW (Arg0)

PNOT ()

Return (Package (0x02)

{

Zero,

Zero

})

}

Scope (_PR)

{

Scope (CPU0)

{

Method (APSN, 0, NotSerialized)

{

Return (0x04)

}

Method (APLF, 0, NotSerialized)

{

Return (0x04)

}

Method (APSS, 0, NotSerialized)

{

Return (Package (0x23)

{

Package (0x06)

{

0x1068,

Zero,

0x0A,

0x2A00,

0x2A00

Package (0x06)

{

0x1004,

Zero,

0x0A,

0x2900,

0x2900

Package (0x06)

{

0x0FA0,

Zero,

0x0A,

0x2800,

0x2800

Package (0x06)

{

0x0F3C,

Zero,

0x0A,

0x2700,

0x2700

Package (0x06)

{

0x0ED8,

Zero,

0x0A,

0x2600,

0x2600

Package (0x06)

{

0x0E74,

Zero,

0x0A,

0x2500,

0x2500

Package (0x06)

{

0x0E10,

Zero,

0x0A,

0x2400,

0x2400

Package (0x06)

{

0x0DAC,

Zero,

0x0A,

0x2300,

0x2300

Package (0x06)

{

0x0D48,

Zero,

0x0A,

0x2200,

0x2200

Package (0x06)

{

0x0CE4,

Zero,

0x0A,

0x2100,

0x2100

Package (0x06)

{

0x0C80,

Zero,

0x0A,

0x2000,

0x2000

Package (0x06)

{

0x0C1C,

Zero,

0x0A,

0x1F00,

0x1F00

Package (0x06)

{

0x0BB8,

Zero,

0x0A,

0x1E00,

0x1E00

Package (0x06)

{

0x0B54,

Zero,

0x0A,

0x1D00,

0x1D00

Package (0x06)

{

0x0AF0,

Zero,

0x0A,

0x1C00,

0x1C00

Package (0x06)

{

0x0A8C,

Zero,

0x0A,

0x1B00,

0x1B00

Package (0x06)

{

0x0A28,

Zero,

0x0A,

0x1A00,

0x1A00

Package (0x06)

{

0x09C4,

Zero,

0x0A,

0x1900,

0x1900

Package (0x06)

{

0x0960,

Zero,

0x0A,

0x1800,

0x1800

Package (0x06)

{

0x08FC,

Zero,

0x0A,

0x1700,

0x1700

Package (0x06)

{

0x0898,

Zero,

0x0A,

0x1600,

0x1600

Package (0x06)

{

0x0834,

Zero,

0x0A,

0x1500,

0x1500

Package (0x06)

{

0x07D0,

Zero,

0x0A,

0x1400,

0x1400

Package (0x06)

{

0x076C,

Zero,

0x0A,

0x1300,

0x1300

Package (0x06)

{

0x0708,

Zero,

0x0A,

0x1200,

0x1200

Package (0x06)

{

0x06A4,

Zero,

0x0A,

0x1100,

0x1100

Package (0x06)

{

0x0640,

Zero,

0x0A,

0x1000,

0x1000

Package (0x06)

{

0x05DC,

Zero,

0x0A,

0x0F00,

0x0F00

Package (0x06)

{

0x0578,

Zero,

0x0A,

0x0E00,

0x0E00

Package (0x06)

{

0x0514,

Zero,

0x0A,

0x0D00,

0x0D00

Package (0x06)

{

0x04B0,

Zero,

0x0A,

0x0C00,

0x0C00

Package (0x06)

{

0x044C,

Zero,

0x0A,

0x0B00,

0x0B00

Package (0x06)

{

0x03E8,

Zero,

0x0A,

0x0A00,

0x0A00

Package (0x06)

{

0x0384,

Zero,

0x0A,

0x0900,

0x0900

Package (0x06)

{

0x0320,

Zero,

0x0A,

0x0800,

0x0800

}

})

}

Method (ACST, 0, NotSerialized)

{

Return (Package (0x06)

{

One,

0x04,

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000000, // Address

0x01, // Access Size

)

One,

0x03,

0x03E8

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000010, // Address

0x03, // Access Size

)

0x03,

0xCD,

0x01F4

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000020, // Address

0x03, // Access Size

)

0x06,

0xF5,

0x015E

Package (0x04)

{

ResourceTemplate ()

{

0x01, // Bit Width

0x02, // Bit Offset

0x0000000000000030, // Address

0x03, // Access Size

)

0x07,

0xF5,

0xC8

}

})

}

Scope (CPU1)

{

Method (APSS, 0, NotSerialized)

{

Return (^^CPU0.APSS ())

}

Method (ACST, 0, NotSerialized)

{

Return (^^CPU0.ACST ())

}

Scope (CPU2)

{

Method (APSS, 0, NotSerialized)

{

Return (^^CPU0.APSS ())

}

Method (ACST, 0, NotSerialized)

{

Return (^^CPU0.ACST ())

}

Scope (CPU3)

{

Method (APSS, 0, NotSerialized)

{

Return (^^CPU0.APSS ())

}

Method (ACST, 0, NotSerialized)

{

Return (^^CPU0.ACST ())

}

Scope (CPU4)

{

Method (APSS, 0, NotSerialized)

{

Return (^^CPU0.APSS ())

}

Method (ACST, 0, NotSerialized)

{

Return (^^CPU0.ACST ())

}

Scope (CPU5)

{

Method (APSS, 0, NotSerialized)

{

Return (^^CPU0.APSS ())

}

Method (ACST, 0, NotSerialized)

{

Return (^^CPU0.ACST ())

}

Scope (CPU6)

{

Method (APSS, 0, NotSerialized)

{

Return (^^CPU0.APSS ())

}

Method (ACST, 0, NotSerialized)

{

Return (^^CPU0.ACST ())

}

Scope (CPU7)

{

Method (APSS, 0, NotSerialized)

{

Return (^^CPU0.APSS ())

}

Method (ACST, 0, NotSerialized)

{

Return (^^CPU0.ACST ())

}

Scope (_SI)

{

Name (CPYR, Buffer (0x51)

{

})

Method (_SST, 1, NotSerialized)

{

If (LEqual (Arg0, Zero))

{

Store ("Indicator off", Debug)

}

If (LEqual (Arg0, One))

{

Store ("Working", Debug)

}

If (LEqual (Arg0, 0x02))

{

Store ("Waking", Debug)

}

If (LEqual (Arg0, 0x03))

{

Store ("Sleeping", Debug)

}

If (LEqual (Arg0, 0x04))

{

Store ("S4 Sleeping", Debug)

}

APIC
DSDT
FACP
FACS
HPET
MCFG
RSDT
SSDT-1
SSDT-2
SSDT

FACP

View File FACP.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20120320-32 [Sep 3 2012]

* Disassembly of /tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/FACP.aml, Wed Nov 13 14:47:37 2013

* ACPI Data Table [FACP]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table]

[004h 0004 4] Table Length : 000000F4

[008h 0008 1] Revision : 04

[009h 0009 1] Checksum : E3

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I"

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 4] FACS Address : 5DED1F80

[028h 0040 4] DSDT Address : 5DBB9160

[02Ch 0044 1] Model : 01

[02Dh 0045 1] PM Profile : 01 [Desktop]

[02Eh 0046 2] SCI Interrupt : 0009

[030h 0048 4] SMI Command Port : 000000B2

[034h 0052 1] ACPI Enable Value : A0

[035h 0053 1] ACPI Disable Value : A1

[036h 0054 1] S4BIOS Command : 00

[037h 0055 1] P-State Control : 00

[038h 0056 4] PM1A Event Block Address : 00000400

[03Ch 0060 4] PM1B Event Block Address : 00000000

[040h 0064 4] PM1A Control Block Address : 00000404

[044h 0068 4] PM1B Control Block Address : 00000000

[048h 0072 4] PM2 Control Block Address : 00000450

[04Ch 0076 4] PM Timer Block Address : 00000408

[050h 0080 4] GPE0 Block Address : 00000420

[054h 0084 4] GPE1 Block Address : 00000000

[058h 0088 1] PM1 Event Block Length : 04

[059h 0089 1] PM1 Control Block Length : 02

[05Ah 0090 1] PM2 Control Block Length : 01

[05Bh 0091 1] PM Timer Block Length : 04

[05Ch 0092 1] GPE0 Block Length : 10

[05Dh 0093 1] GPE1 Block Length : 00

[05Eh 0094 1] GPE1 Base Offset : 00

[05Fh 0095 1] _CST Support : 00

[060h 0096 2] C2 Latency : 0065

[062h 0098 2] C3 Latency : 03E9

[064h 0100 2] CPU Cache Size : 0400

[066h 0102 2] Cache Flush Stride : 0010

[068h 0104 1] Duty Cycle Offset : 00

[069h 0105 1] Duty Cycle Width : 00

[06Ah 0106 1] RTC Day Alarm Index : 0D

[06Bh 0107 1] RTC Month Alarm Index : 00

[06Ch 0108 1] RTC Century Index : 32

[06Dh 0109 2] Boot Flags (decoded below) : 0013

Legacy Devices Supported (V2) : 1

8042 Present on ports 60/64 (V2) : 1

VGA Not Present (V4) : 0

MSI Not Supported (V4) : 0

PCIe ASPM Not Supported (V4) : 1

CMOS RTC Not Present (V5) : 0

[06Fh 0111 1] Reserved : 00

[070h 0112 4] Flags (decoded below) : 000384A5

WBINVD instruction is operational (V1) : 1

WBINVD flushes all caches (V1) : 0

All CPUs support C1 (V1) : 1

C2 works on MP system (V1) : 0

Control Method Power Button (V1) : 0

Control Method Sleep Button (V1) : 1

RTC wake not in fixed reg space (V1) : 0

RTC can wake system from S4 (V1) : 1

32-bit PM Timer (V1) : 0

Docking Supported (V1) : 0

Reset Register Supported (V2) : 1

Sealed Case (V3) : 0

Headless - No Video (V3) : 0

Use native instr after SLP_TYPx (V3) : 0

PCIEXP_WAK Bits Supported (V4) : 0

Use Platform Timer (V4) : 1

RTC_STS valid on S4 wake (V4) : 1

Remote Power-on capable (V4) : 1

Use APIC Cluster Model (V4) : 0

Use APIC Physical Destination Mode (V4) : 0

Hardware Reduced (V5) : 0

Low Power S0 Idle (V5) : 0

[074h 0116 12] Reset Register : [Generic Address Structure]

[074h 0116 1] Space ID : 01 [SystemIO]

[075h 0117 1] Bit Width : 08

[076h 0118 1] Bit Offset : 00

[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy]

[078h 0120 8] Address : 0000000000000CF9

[080h 0128 1] Value to cause reset : 06

[081h 0129 3] Reserved : 000000

[084h 0132 8] FACS Address : 0000000000000000

[08Ch 0140 8] DSDT Address : 000000005DBB9160

[094h 0148 12] PM1A Event Block : [Generic Address Structure]

[094h 0148 1] Space ID : 01 [SystemIO]

[095h 0149 1] Bit Width : 20

[096h 0150 1] Bit Offset : 00

[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy]

[098h 0152 8] Address : 0000000000000400

[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]

[0A0h 0160 1] Space ID : 01 [SystemIO]

[0A1h 0161 1] Bit Width : 00

[0A2h 0162 1] Bit Offset : 00

[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]

[0A4h 0164 8] Address : 0000000000000000

[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]

[0ACh 0172 1] Space ID : 01 [SystemIO]

[0ADh 0173 1] Bit Width : 10

[0AEh 0174 1] Bit Offset : 00

[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy]

[0B0h 0176 8] Address : 0000000000000404

[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]

[0B8h 0184 1] Space ID : 01 [SystemIO]

[0B9h 0185 1] Bit Width : 00

[0BAh 0186 1] Bit Offset : 00

[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]

[0BCh 0188 8] Address : 0000000000000000

[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]

[0C4h 0196 1] Space ID : 01 [SystemIO]

[0C5h 0197 1] Bit Width : 08

[0C6h 0198 1] Bit Offset : 00

[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]

[0C8h 0200 8] Address : 0000000000000450

[0D0h 0208 12] PM Timer Block : [Generic Address Structure]

[0D0h 0208 1] Space ID : 01 [SystemIO]

[0D1h 0209 1] Bit Width : 20

[0D2h 0210 1] Bit Offset : 00

[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy]

[0D4h 0212 8] Address : 0000000000000408

[0DCh 0220 12] GPE0 Block : [Generic Address Structure]

[0DCh 0220 1] Space ID : 01 [SystemIO]

[0DDh 0221 1] Bit Width : 80

[0DEh 0222 1] Bit Offset : 00

[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy]

[0E0h 0224 8] Address : 0000000000000420

[0E8h 0232 12] GPE1 Block : [Generic Address Structure]

[0E8h 0232 1] Space ID : 01 [SystemIO]

[0E9h 0233 1] Bit Width : 00

[0EAh 0234 1] Bit Offset : 00

[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy]

[0ECh 0236 8] Address : 0000000000000000

Raw Table Data: Length 244 (0xF4)

0000: 46 41 43 50 F4 00 00 00 04 E3 41 4C 41 53 4B 41 FACP......ALASKA

0010: 41 20 4D 20 49 00 00 00 09 20 07 01 41 4D 49 20 A M I.... ..AMI

0020: 13 00 01 00 80 1F ED 5D 60 91 BB 5D 01 01 09 00 .......]`..]....

0030: B2 00 00 00 A0 A1 00 00 00 04 00 00 00 00 00 00 ................

0040: 04 04 00 00 00 00 00 00 50 04 00 00 08 04 00 00 ........P.......

0050: 20 04 00 00 00 00 00 00 04 02 01 04 10 00 00 00 ...............

0060: 65 00 E9 03 00 04 10 00 00 00 0D 00 32 13 00 00 e...........2...

0070: A5 84 03 00 01 08 00 00 F9 0C 00 00 00 00 00 00 ................

0080: 06 00 00 00 00 00 00 00 00 00 00 00 60 91 BB 5D ............`..]

0090: 00 00 00 00 01 20 00 00 00 04 00 00 00 00 00 00 ..... ..........

00A0: 01 00 00 00 00 00 00 00 00 00 00 00 01 10 00 00 ................

00B0: 04 04 00 00 00 00 00 00 01 00 00 00 00 00 00 00 ................

00C0: 00 00 00 00 01 08 00 00 50 04 00 00 00 00 00 00 ........P.......

00D0: 01 20 00 00 08 04 00 00 00 00 00 00 01 80 00 00 . ..............

00E0: 20 04 00 00 00 00 00 00 01 00 00 00 00 00 00 00 ...............

00F0: 00 00 00 00 ....

APIC
DSDT
FACP
FACS
HPET
MCFG
RSDT
SSDT-1
SSDT-2
SSDT

FACS

View File FACS.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20120320-32 [Sep 3 2012]

* Disassembly of /tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/FACS.aml, Wed Nov 13 14:47:37 2013

* ACPI Data Table [FACS]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "FACS"

[004h 0004 4] Length : 00000040

[008h 0008 4] Hardware Signature : 00000000

[00Ch 0012 4] 32 Firmware Waking Vector : 00000000

[010h 0016 4] Global Lock : 00000000

[014h 0020 4] Flags (decoded below) : 00000000

S4BIOS Support Present : 0

64-bit Wake Supported (V2) : 0

[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000

[020h 0032 1] Version : 02

[021h 0033 3] Reserved : 000000

[024h 0036 4] OspmFlags (decoded below) : 00000000

64-bit Wake Env Required (V2) : 0

Raw Table Data: Length 64 (0x40)

0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 FACS@...........

0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0020: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

APIC
DSDT
FACP
FACS
HPET
MCFG
RSDT
SSDT-1
SSDT-2
SSDT

HPET

View File HPET.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20120320-32 [Sep 3 2012]

* Disassembly of /tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/HPET.aml, Wed Nov 13 14:47:37 2013

* ACPI Data Table [HPET]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "HPET" [High Precision Event Timer table]

[004h 0004 4] Table Length : 00000038

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : B6

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I"

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI."

[020h 0032 4] Asl Compiler Revision : 00000005

[024h 0036 4] Hardware Block ID : 8086A701

[028h 0040 12] Timer Block Register : [Generic Address Structure]

[028h 0040 1] Space ID : 00 [SystemMemory]

[029h 0041 1] Bit Width : 40

[02Ah 0042 1] Bit Offset : 00

[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy]

[02Ch 0044 8] Address : 00000000FED00000

[034h 0052 1] Sequence Number : 00

[035h 0053 2] Minimum Clock Ticks : 37EE

[037h 0055 1] Flags (decoded below) : 00

4K Page Protect : 0

64K Page Protect : 0

Raw Table Data: Length 56 (0x38)

0000: 48 50 45 54 38 00 00 00 01 B6 41 4C 41 53 4B 41 HPET8.....ALASKA

0010: 41 20 4D 20 49 00 00 00 09 20 07 01 41 4D 49 2E A M I.... ..AMI.

0020: 05 00 00 00 01 A7 86 80 00 40 00 00 00 00 D0 FE .........@......

0030: 00 00 00 00 00 EE 37 00 ......7.

APIC
DSDT
FACP
FACS
HPET
MCFG
RSDT
SSDT-1
SSDT-2
SSDT

MCFG

View File MCFG.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20120320-32 [Sep 3 2012]

* Disassembly of /tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/MCFG.aml, Wed Nov 13 14:47:37 2013

* ACPI Data Table [MCFG]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "MCFG" [Memory Mapped Configuration table]

[004h 0004 4] Table Length : 0000003C

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 35

[00Ah 0010 6] Oem ID : ""

[010h 0016 8] Oem Table ID : ""

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "MSFT"

[020h 0032 4] Asl Compiler Revision : 00000097

[024h 0036 8] Reserved : 0000000000000000

[02Ch 0044 8] Base Address : 00000000F0000000

[034h 0052 2] Segment Group Number : 0000

[036h 0054 1] Start Bus Number : 00

[037h 0055 1] End Bus Number : 7F

[038h 0056 4] Reserved : 00000000

Raw Table Data: Length 60 (0x3C)

0000: 4D 43 46 47 3C 00 00 00 01 35 00 00 00 00 00 00 MCFG<....5......

0010: 00 00 00 00 00 00 00 00 09 20 07 01 4D 53 46 54 ......... ..MSFT

0020: 97 00 00 00 00 00 00 00 00 00 00 00 00 00 00 F0 ................

0030: 00 00 00 00 00 00 00 7F 00 00 00 00 ............

APIC
DSDT
FACP
FACS
HPET
MCFG
RSDT
SSDT-1
SSDT-2
SSDT

RSDT

View File RSDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20120320-32 [Sep 3 2012]

* Disassembly of /tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/RSDT.aml, Wed Nov 13 14:47:37 2013

* ACPI Data Table [XSDT]

* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue

[000h 0000 4] Signature : "XSDT" [Extended System Description Table]

[004h 0004 4] Table Length : 0000005C

[008h 0008 1] Revision : 01

[009h 0009 1] Checksum : 72

[00Ah 0010 6] Oem ID : "ALASKA"

[010h 0016 8] Oem Table ID : "A M I"

[018h 0024 4] Oem Revision : 01072009

[01Ch 0028 4] Asl Compiler ID : "AMI "

[020h 0032 4] Asl Compiler Revision : 00010013

[024h 0036 8] ACPI Table Address 0 : 000000005DBC0228

[02Ch 0044 8] ACPI Table Address 1 : 000000005DBC0320

[034h 0052 8] ACPI Table Address 2 : 000000005DBC03B8

[03Ch 0060 8] ACPI Table Address 3 : 000000005DBC03F8

[044h 0068 8] ACPI Table Address 4 : 000000005DBC0430

[04Ch 0076 8] ACPI Table Address 5 : 000000005DBC07A0

[054h 0084 8] ACPI Table Address 6 : 000000005DBC1150

Raw Table Data: Length 92 (0x5C)

0000: 58 53 44 54 5C 00 00 00 01 72 41 4C 41 53 4B 41 XSDT\....rALASKA

0010: 41 20 4D 20 49 00 00 00 09 20 07 01 41 4D 49 20 A M I.... ..AMI

0020: 13 00 01 00 28 02 BC 5D 00 00 00 00 20 03 BC 5D ....(..].... ..]

0030: 00 00 00 00 B8 03 BC 5D 00 00 00 00 F8 03 BC 5D .......].......]

0040: 00 00 00 00 30 04 BC 5D 00 00 00 00 A0 07 BC 5D ....0..].......]

0050: 00 00 00 00 50 11 BC 5D 00 00 00 00 ....P..]....

APIC
DSDT
FACP
FACS
HPET
MCFG
RSDT
SSDT-1
SSDT-2
SSDT

SSDT-1

View File SSDT-1.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20120320-32 [Sep 3 2012]

* Disassembly of /tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/SSDT-1.aml, Wed Nov 13 14:47:37 2013

* Original Table Header:

* Signature "SSDT"

* Length 0x000009AA (2474)

* Revision 0x01

* Checksum 0x7F

* OEM ID "PmRef"

* OEM Table ID "Cpu0Ist"

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20051117 (537202967)

DefinitionBlock ("/tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/SSDT-1.aml", "SSDT", 1, "PmRef", "Cpu0Ist", 0x00003000)

{

External (TCNT, IntObj)

External (NPSS, IntObj)

External (PDC0)

External (CFGD)

External (\_PR_.CPPC, IntObj)

External (\_PR_.CPU0, DeviceObj)

Scope (\_PR.CPU0)

{

Name (_PPC, Zero)

Method (_PCT, 0, NotSerialized)

{

Store (\_PR.CPPC, \_PR.CPU0._PPC)

If (LAnd (And (CFGD, One), And (PDC0, One)))

{

Return (Package (0x02)

{

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

ResourceTemplate ()

{

0x00, // Bit Width

0x00, // Bit Offset

0x0000000000000000, // Address

}

})

}

Return (Package (0x02)

{

ResourceTemplate ()

{

0x10, // Bit Width

0x00, // Bit Offset

0x0000000000000200, // Address

ResourceTemplate ()

{

0x08, // Bit Width

0x00, // Bit Offset

0x00000000000000B3, // Address

}

})

}

Method (XPSS, 0, NotSerialized)

{

If (And (PDC0, One))

{

Return (NPSS)

}

Return (SPSS)

}

Name (SPSS, Package (0x10)

{

Package (0x06)

{

0x00000F3D,

0x00012CC8,

0x0000006E,

0x0000000A,

0x00000083,

0x00000000

Package (0x06)

{

0x00000F3C,

0x00012CC8,

0x0000006E,

0x0000000A,

0x00000183,

0x00000001

Package (0x06)

{

0x00000E74,

0x00011453,

0x0000006E,

0x0000000A,

0x00000283,

0x00000002

Package (0x06)

{

0x00000E10,

0x00010B55,

0x0000006E,

0x0000000A,

0x00000383,

0x00000003

Package (0x06)

{

0x00000D48,

0x0000F6F9,

0x0000006E,

0x0000000A,

0x00000483,

0x00000004

Package (0x06)

{

0x00000C80,

0x0000E366,

0x0000006E,

0x0000000A,

0x00000583,

0x00000005

Package (0x06)

{

0x00000C1C,

0x0000D87C,

0x0000006E,

0x0000000A,

0x00000683,

0x00000006

Package (0x06)

{

0x00000B54,

0x0000C5F8,

0x0000006E,

0x0000000A,

0x00000783,

0x00000007

Package (0x06)

{

0x00000A8C,

0x0000B432,

0x0000006E,

0x0000000A,

0x00000883,

0x00000008

Package (0x06)

{

0x00000A28,

0x0000AA42,

0x0000006E,

0x0000000A,

0x00000983,

0x00000009

Package (0x06)

{

0x00000960,

0x00009982,

0x0000006E,

0x0000000A,

0x00000A83,

0x0000000A

Package (0x06)

{

0x000008FC,

0x00009025,

0x0000006E,

0x0000000A,

0x00000B83,

0x0000000B

Package (0x06)

{

0x00000834,

0x00008077,

0x0000006E,

0x0000000A,

0x00000C83,

0x0000000C

Package (0x06)

{

0x0000076C,

0x00007169,

0x0000006E,

0x0000000A,

0x00000D83,

0x0000000D

Package (0x06)

{

0x00000708,

0x00006B4A,

0x0000006E,

0x0000000A,

0x00000E83,

0x0000000E

Package (0x06)

{

0x00000640,

0x00005D30,

0x0000006E,

0x0000000A,

0x00000F83,

0x0000000F

}

})

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Name (_PSS, Package (0x10)

{

Package (0x06)

{

0x00000F3D,

0x00012CC8,

0x0000000A,

0x0000FF00,

0x0000FF00

Package (0x06)

{

0x00000F3C,

0x00012CC8,

0x0000000A,

0x00002700,

0x00002700

Package (0x06)

{

0x00000E74,

0x00011453,

0x0000000A,

0x00002500,

0x00002500

Package (0x06)

{

0x00000E10,

0x00010B55,

0x0000000A,

0x00002400,

0x00002400

Package (0x06)

{

0x00000D48,

0x0000F6F9,

0x0000000A,

0x00002200,

0x00002200

Package (0x06)

{

0x00000C80,

0x0000E366,

0x0000000A,

0x00002000,

0x00002000

Package (0x06)

{

0x00000C1C,

0x0000D87C,

0x0000000A,

0x00001F00,

0x00001F00

Package (0x06)

{

0x00000B54,

0x0000C5F8,

0x0000000A,

0x00001D00,

0x00001D00

Package (0x06)

{

0x00000A8C,

0x0000B432,

0x0000000A,

0x00001B00,

0x00001B00

Package (0x06)

{

0x00000A28,

0x0000AA42,

0x0000000A,

0x00001A00,

0x00001A00

Package (0x06)

{

0x00000960,

0x00009982,

0x0000000A,

0x00001800,

0x00001800

Package (0x06)

{

0x000008FC,

0x00009025,

0x0000000A,

0x00001700,

0x00001700

Package (0x06)

{

0x00000834,

0x00008077,

0x0000000A,

0x00001500,

0x00001500

Package (0x06)

{

0x0000076C,

0x00007169,

0x0000000A,

0x00001300,

0x00001300

Package (0x06)

{

0x00000708,

0x00006B4A,

0x0000000A,

0x00001200,

0x00001200

Package (0x06)

{

0x00000640,

0x00005D30,

0x0000000A,

0x00001000,

0x00001000

}

})

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Package (0x06)

{

0x80000000,

0x80000000

}

Name (PSDF, Zero)

Method (_PSD, 0, NotSerialized)

{

If (LNot (PSDF))

{

Store (TCNT, Index (DerefOf (Index (HPSD, Zero)), 0x04))

Store (TCNT, Index (DerefOf (Index (SPSD, Zero)), 0x04))

Store (Ones, PSDF)

}

If (And (PDC0, 0x0800))

{

Return (HPSD)

}

Return (SPSD)

}

Name (HPSD, Package (0x01)

{

Package (0x05)

{

0x05,

Zero,

0xFE,

0x80

}

})

Name (SPSD, Package (0x01)

{

Package (0x05)

{

0x05,

Zero,

0xFC,

0x80

}

})

}

APIC
DSDT
FACP
FACS
HPET
MCFG
RSDT
SSDT-1
SSDT-2
SSDT

SSDT-2

View File SSDT-2.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20120320-32 [Sep 3 2012]

* Disassembly of /tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/SSDT-2.aml, Wed Nov 13 14:47:37 2013

* Original Table Header:

* Signature "SSDT"

* Length 0x00000A92 (2706)

* Revision 0x01

* Checksum 0x61

* OEM ID "PmRef"

* OEM Table ID "CpuPm"

* OEM Revision 0x00003000 (12288)

* Compiler ID "INTL"

* Compiler Version 0x20051117 (537202967)

DefinitionBlock ("/tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/SSDT-2.aml", "SSDT", 1, "PmRef", "CpuPm", 0x00003000)

{

External (\_PR_.CPU7, DeviceObj)

External (\_PR_.CPU6, DeviceObj)

External (\_PR_.CPU5, DeviceObj)

External (\_PR_.CPU4, DeviceObj)

External (\_PR_.CPU3, DeviceObj)

External (\_PR_.CPU2, DeviceObj)

External (\_PR_.CPU1, DeviceObj)

External (\_PR_.CPU0, DeviceObj)

External (\_PR_.CPU0._PPC)

Scope (\)

{

Name (SSDT, Package (0x0C)

{

"CPU0IST ",

0x5AF3C018,

0x000009AA,

"APIST ",

0x5D990A98,

0x00000303,

"CPU0CST ",

0x5D98F018,

0x0000083B,

"APCST ",

0x5D99CC18,

0x00000119

})

Name (CFGD, 0x0066F6D7)

Name (\PDC0, 0x80000000)

Name (\PDC1, 0x80000000)

Name (\PDC2, 0x80000000)

Name (\PDC3, 0x80000000)

Name (\PDC4, 0x80000000)

Name (\PDC5, 0x80000000)

Name (\PDC6, 0x80000000)

Name (\PDC7, 0x80000000)

Name (\SDTL, Zero)

}

Scope (\_PR)

{

OperationRegion (PPMT, SystemMemory, 0x5DED2E18, 0x0029)

Field (PPMT, AnyAcc, Lock, Preserve)

{

PGRV, 8,

Offset (0x06),

ACRT, 8,

APSV, 8,

AAC0, 8,

CPID, 32,

CPPC, 8,

CCTP, 8,

CLVL, 8,

CBMI, 8,

PL10, 16,

PL20, 16,

PLW0, 8,

CTC0, 8,

TAR0, 8,

PPC0, 8,

PL11, 16,

PL21, 16,

PLW1, 8,

CTC1, 8,

TAR1, 8,

PPC1, 8,

PL12, 16,

PL22, 16,

PLW2, 8,

CTC2, 8,

TAR2, 8,

PPC2, 8

}

Scope (\_PR.CPU0)

{

Name (HI0, Zero)

Name (HC0, Zero)

Method (_PDC, 1, NotSerialized)

{

Store (CPPC, \_PR.CPU0._PPC)

Store (CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized)

{

Store (COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (CPDC, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, REVS)

CreateDWordField (Arg0, 0x04, SIZE)

Store (SizeOf (Arg0), Local0)

Store (Subtract (Local0, 0x08), Local1)

CreateField (Arg0, 0x40, Multiply (Local1, 0x08), TEMP)

Name (STS0, Buffer (0x04)

{

0x00, 0x00, 0x00, 0x00

})

Concatenate (STS0, TEMP, Local2)

Return (COSC (Buffer (0x10)

{

/* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,

/* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53

}, REVS, SIZE, Local2))

}

Method (COSC, 4, NotSerialized)

{

CreateDWordField (Arg3, Zero, STS0)

CreateDWordField (Arg3, 0x04, CAP0)

CreateDWordField (Arg0, Zero, IID0)

CreateDWordField (Arg0, 0x04, IID1)

CreateDWordField (Arg0, 0x08, IID2)

CreateDWordField (Arg0, 0x0C, IID3)

Name (UID0, Buffer (0x10)

{

/* 0000 */ 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 0xBE, 0x47,

/* 0008 */ 0x9E, 0xBD, 0xD8, 0x70, 0x58, 0x71, 0x39, 0x53

})

CreateDWordField (UID0, Zero, EID0)

CreateDWordField (UID0, 0x04, EID1)

CreateDWordField (UID0, 0x08, EID2)

CreateDWordField (UID0, 0x0C, EID3)

If (LNot (LAnd (LAnd (LEqual (IID0, EID0), LEqual (IID1, EID1)),

LAnd (LEqual (IID2, EID2), LEqual (IID3, EID3)))))

{

Store (0x06, STS0)

Return (Arg3)

}

If (LNotEqual (Arg1, One))

{

Store (0x0A, STS0)

Return (Arg3)

}

Return (Arg3)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS0)

CreateDWordField (Arg0, 0x04, CAP0)

If (LOr (LEqual (STS0, 0x06), LEqual (STS0, 0x0A)))

{

Return (Zero)

}

If (And (STS0, One))

{

And (CAP0, 0x0BFF, CAP0)

Return (Zero)

}

Or (And (PDC0, 0x7FFFFFFF), CAP0, PDC0)

If (And (CFGD, 0x3E))

{

If (LAnd (LAnd (And (CFGD, 0x0400), And (PDC0, 0x18

)), LNot (And (SDTL, 0x02))))

{

Or (SDTL, 0x02, SDTL)

OperationRegion (CST0, SystemMemory, DerefOf (Index (SSDT, 0x07)), DerefOf (Index (SSDT, 0x08

)))

Load (CST0, HC0)

}

Return (Zero)

}

Scope (\_PR.CPU1)

{

Name (HI1, Zero)

Name (HC1, Zero)

Method (_PDC, 1, NotSerialized)

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized)

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS1)

CreateDWordField (Arg0, 0x04, CAP1)

If (LOr (LEqual (STS1, 0x06), LEqual (STS1, 0x0A)))

{

Return (Zero)

}

If (And (STS1, One))

{

And (CAP1, 0x0BFF, CAP1)

Return (Zero)

}

Or (And (PDC1, 0x7FFFFFFF), CAP1, PDC1)

If (LEqual (And (PDC1, 0x09), 0x09))

{

APPT ()

}

If (And (PDC1, 0x18))

{

APCT ()

}

Store (PDC1, PDC0)

Return (Zero)

}

Method (APCT, 0, NotSerialized)

{

If (LAnd (And (CFGD, 0x2E), LNot (And (SDTL, 0x20

))))

{

Or (SDTL, 0x20, SDTL)

OperationRegion (CST1, SystemMemory, DerefOf (Index (SSDT, 0x0A)), DerefOf (Index (SSDT, 0x0B

)))

Load (CST1, HC1)

}

Method (APPT, 0, NotSerialized)

{

If (LAnd (And (CFGD, One), LNot (And (SDTL, 0x10

))))

{

Or (SDTL, 0x10, SDTL)

OperationRegion (IST1, SystemMemory, DerefOf (Index (SSDT, 0x04)), DerefOf (Index (SSDT, 0x05

)))

Load (IST1, HI1)

}

Scope (\_PR.CPU2)

{

Method (_PDC, 1, NotSerialized)

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized)

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS2)

CreateDWordField (Arg0, 0x04, CAP2)

If (LOr (LEqual (STS2, 0x06), LEqual (STS2, 0x0A)))

{

Return (Zero)

}

If (And (STS2, One))

{

And (CAP2, 0x0BFF, CAP2)

Return (Zero)

}

Or (And (PDC2, 0x7FFFFFFF), CAP2, PDC2)

If (LEqual (And (PDC2, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (PDC2, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC2, PDC0)

Return (Zero)

}

Scope (\_PR.CPU3)

{

Method (_PDC, 1, NotSerialized)

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized)

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS3)

CreateDWordField (Arg0, 0x04, CAP3)

If (LOr (LEqual (STS3, 0x06), LEqual (STS3, 0x0A)))

{

Return (Zero)

}

If (And (STS3, One))

{

And (CAP3, 0x0BFF, CAP3)

Return (Zero)

}

Or (And (PDC3, 0x7FFFFFFF), CAP3, PDC3)

If (LEqual (And (PDC3, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (PDC3, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC3, PDC0)

Return (Zero)

}

Scope (\_PR.CPU4)

{

Method (_PDC, 1, NotSerialized)

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized)

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS4)

CreateDWordField (Arg0, 0x04, CAP4)

If (LOr (LEqual (STS4, 0x06), LEqual (STS4, 0x0A)))

{

Return (Zero)

}

If (And (STS4, One))

{

And (CAP4, 0x0BFF, CAP4)

Return (Zero)

}

Or (And (PDC4, 0x7FFFFFFF), CAP4, PDC4)

If (LEqual (And (PDC4, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (PDC4, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC4, PDC0)

Return (Zero)

}

Scope (\_PR.CPU5)

{

Method (_PDC, 1, NotSerialized)

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized)

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS5)

CreateDWordField (Arg0, 0x04, CAP5)

If (LOr (LEqual (STS5, 0x06), LEqual (STS5, 0x0A)))

{

Return (Zero)

}

If (And (STS5, One))

{

And (CAP5, 0x0BFF, CAP5)

Return (Zero)

}

Or (And (PDC5, 0x7FFFFFFF), CAP5, PDC5)

If (LEqual (And (PDC5, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (PDC5, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC5, PDC0)

Return (Zero)

}

Scope (\_PR.CPU6)

{

Method (_PDC, 1, NotSerialized)

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized)

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS6)

CreateDWordField (Arg0, 0x04, CAP6)

If (LOr (LEqual (STS6, 0x06), LEqual (STS6, 0x0A)))

{

Return (Zero)

}

If (And (STS6, One))

{

And (CAP6, 0x0BFF, CAP6)

Return (Zero)

}

Or (And (PDC6, 0x7FFFFFFF), CAP6, PDC6)

If (LEqual (And (PDC6, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (PDC6, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC6, PDC0)

Return (Zero)

}

Scope (\_PR.CPU7)

{

Method (_PDC, 1, NotSerialized)

{

Store (\_PR.CPU0.CPDC (Arg0), Local0)

GCAP (Local0)

Return (Local0)

}

Method (_OSC, 4, NotSerialized)

{

Store (\_PR.CPU0.COSC (Arg0, Arg1, Arg2, Arg3), Local0)

GCAP (Local0)

Return (Local0)

}

Method (GCAP, 1, NotSerialized)

{

CreateDWordField (Arg0, Zero, STS7)

CreateDWordField (Arg0, 0x04, CAP7)

If (LOr (LEqual (STS7, 0x06), LEqual (STS7, 0x0A)))

{

Return (Zero)

}

If (And (STS7, One))

{

And (CAP7, 0x0BFF, CAP7)

Return (Zero)

}

Or (And (PDC7, 0x7FFFFFFF), CAP7, PDC7)

If (LEqual (And (PDC7, 0x09), 0x09))

{

\_PR.CPU1.APPT ()

}

If (And (PDC7, 0x18))

{

\_PR.CPU1.APCT ()

}

Store (PDC7, PDC0)

Return (Zero)

}

APIC
DSDT
FACP
FACS
HPET
MCFG
RSDT
SSDT-1
SSDT-2
SSDT

SSDT

View File SSDT.dsl

* Intel ACPI Component Architecture

* AML Disassembler version 20120320-32 [Sep 3 2012]

* Disassembly of /tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/SSDT.aml, Wed Nov 13 14:47:37 2013

* Original Table Header:

* Signature "SSDT"

* Length 0x0000036D (877)

* Revision 0x01

* Checksum 0x3C

* OEM ID "SataRe"

* OEM Table ID "SataTabl"

* OEM Revision 0x00001000 (4096)

* Compiler ID "INTL"

* Compiler Version 0x20091112 (537465106)

DefinitionBlock ("/tmp/DarwinDumper_2.4.9_AMI_X64_00:000_00:000_Ozmosis_1.01.0828_RELEASE_(2013-10-31_19:58:45_VS2012x86)_ML_Josh/ACPIDump/AML/SSDT.aml", "SSDT", 1, "SataRe", "SataTabl", 0x00001000)

{

External (FHPP)

External (DSSP)

External (\_SB_.PCI0.SAT0, DeviceObj)

Scope (\)

{

Name (STFE, Buffer (0x07)

{

0x10, 0x06, 0x00, 0x00, 0x00, 0x00, 0xEF

})

Name (STFD, Buffer (0x07)

{

0x90, 0x06, 0x00, 0x00, 0x00, 0x00, 0xEF

})

Name (FZTF, Buffer (0x07)

{

0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF5

})

Name (DCFL, Buffer (0x07)

{

0xC1, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB1

})

Name (SCBF, Buffer (0x15) {})

Name (CMDC, Zero)

Method (GTFB, 2, Serialized)

{

Multiply (CMDC, 0x38, Local0)

CreateField (SCBF, Local0, 0x38, CMDX)

Multiply (CMDC, 0x07, Local0)

CreateByteField (SCBF, Add (Local0, One), A001)

Store (Arg0, CMDX)

Store (Arg1, A001)

Increment (CMDC)

}

Scope (\_SB.PCI0.SAT0)

{

Name (REGF, One)

Method (_REG, 2, NotSerialized)

{

If (LEqual (Arg0, 0x02))

{

Store (Arg1, REGF)

}

Name (TMD0, Buffer (0x14) {})

CreateDWordField (TMD0, Zero, PIO0)

CreateDWordField (TMD0, 0x04, DMA0)

CreateDWordField (TMD0, 0x08, PIO1)

CreateDWordField (TMD0, 0x0C, DMA1)

CreateDWordField (TMD0, 0x10, CHNF)

Method (_GTM, 0, NotSerialized)

{

Store (0x78, PIO0)

Store (0x14, DMA0)

Store (0x78, PIO1)

Store (0x14, DMA1)

Or (CHNF, 0x05, CHNF)

Return (TMD0)

}

Method (_STM, 3, NotSerialized)

{

}

Device (SPT0)

{

Name (_ADR, 0xFFFF)

Method (_GTF, 0, NotSerialized)

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT1)

{

Name (_ADR, 0x0001FFFF)

Method (_GTF, 0, NotSerialized)

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT2)

{

Name (_ADR, 0x0002FFFF)

Method (_GTF, 0, NotSerialized)

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT3)

{

Name (_ADR, 0x0003FFFF)

Method (_GTF, 0, NotSerialized)

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT4)

{

Name (_ADR, 0x0004FFFF)

Method (_GTF, 0, NotSerialized)

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

Device (SPT5)

{

Name (_ADR, 0x0005FFFF)

Method (_GTF, 0, NotSerialized)

{

Store (Zero, CMDC)

If (LOr (DSSP, FHPP))

{

GTFB (STFD, 0x06)

}

Else

{

GTFB (STFE, 0x06)

}

GTFB (FZTF, Zero)

GTFB (DCFL, Zero)

Return (SCBF)

}

APIC
DSDT
FACP
FACS
HPET
MCFG
RSDT
SSDT-1
SSDT-2
SSDT

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Bootloader Config .plist files

/disk0s2-HD/Library/Preferences/SystemConfiguration/com.apple.Boot.plist : Apple

View com.apple.Boot.plist

<?xml version="1.0" encoding="UTF-8"?>

<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">

<dict>

<key>Kernel Flags</key>

</dict>

</plist>

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Device Properties

Dumped using gfxutil v0.71b by McMatrix from 2007

View device-properties.plist File

<?xml version="1.0" encoding="UTF-8"?>

<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">

<dict>

<key>PciRoot(0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)</key>

<dict>

<key>@0,AAPL,boot-display</key>

<key>@0,compatible</key>

<string>NVDA,NVMac</string>

<key>@0,device_type</key>

<string>display</string>

<key>@0,display-cfg</key>

<data>

AwEDAA==

</data>

<string>NVDA,Display-A</string>

<key>@1,compatible</key>

<string>NVDA,NVMac</string>

<key>@1,device_type</key>

<string>display</string>

<key>@1,display-cfg</key>

<data>

//8AAQ==

</data>

<string>NVDA,Display-B</string>

<key>NVCAP</key>

<data>

BAAAAAAAAwAcAAAAAAAABwAAAAA=

</data>

<data>

AQAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA==

</data>

<key>VRAM,totalsize</key>

<data>

AAAAQA==

</data>

<key>device_type</key>

<string>NVDA,Parent</string>

<key>model</key>

<string>GeForce GTX 560 Ti</string>

<key>rom-revision</key>

</dict>

<key>PciRoot(0x0)/Pci(0x1b,0x0)</key>

<dict>

<key>AFGLowPowerState</key>

<data>

AQAAAA==

</data>

<key>PinConfigurations</key>

<data>

MEERAWARAQFwYQEBEJGBASCRoJBAQCEBUBFFAQ==

</data>

<key>layout-id</key>

<data>

AwAAAA==

</data>

<key>platformFamily</key>

<data>

AA==

</data>

</dict>

</plist>

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Disk Partition Table Info

/dev/disk0

Dumped using fdisk440 /dev/diskX & gpt -r show /dev/diskX View disk0-PartitionTableInfo.txt File

============================================================================

/dev/disk0 - M4-CT512M4SSD1 Media - 512 GB

----------------------------------------------------------------------------

start size index contents

0 1 PMBR

1 1 Pri GPT header

2 32 Pri GPT table

34 6

40 409600 1 GPT part - C12A7328-F81F-11D2-BA4B-00A0C93EC93B

409640 999543392 2 GPT part - 48465300-0000-11AA-AA11-00306543ECAC

999953032 262151

1000215183 32 Sec GPT table

1000215215 1 Sec GPT header

Disk: /dev/disk0 geometry: 62260/255/63 [1000215216 sectors]

Signature: 0xAA55

Starting Ending

#: id cyl hd sec - cyl hd sec [ start - size]

------------------------------------------------------------------------

1: EE 1023 254 63 - 1023 254 63 [ 1 - 1000215215] GPT

2: 00 0 0 0 - 0 0 0 [ 0 - 0] unused

3: 00 0 0 0 - 0 0 0 [ 0 - 0] unused

4: 00 0 0 0 - 0 0 0 [ 0 - 0] unused

/dev/disk1

Dumped using fdisk440 /dev/diskX & gpt -r show /dev/diskX View disk1-PartitionTableInfo.txt File

============================================================================

/dev/disk1 - ST3000DM001-9YN166 Media - 3 TB

----------------------------------------------------------------------------

start size index contents

0 1 PMBR

1 1 Pri GPT header

2 32 Pri GPT table

34 6

40 409600 1 GPT part - C12A7328-F81F-11D2-BA4B-00A0C93EC93B

409640 5859861344 2 GPT part - 48465300-0000-11AA-AA11-00306543ECAC

5860270984 262151

5860533135 32 Sec GPT table

5860533167 1 Sec GPT header

Disk: /dev/disk1 geometry: 97451/255/63 [1565565872 sectors]

Signature: 0xAA55

Starting Ending

#: id cyl hd sec - cyl hd sec [ start - size]

------------------------------------------------------------------------

1: EE 1023 254 63 - 1023 254 63 [ 1 - -2] GPT

2: 00 0 0 0 - 0 0 0 [ 0 - 0] unused

3: 00 0 0 0 - 0 0 0 [ 0 - 0] unused

4: 00 0 0 0 - 0 0 0 [ 0 - 0] unused

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Diskutil & Bootloaders

/dev/disk0

M4-CT512M4SSD1 Media | 512 GB | GUID_partition_scheme | MBR boot code detected: Unknown (If you know, please report). | View Disk Sectors

ACTV	DEVICE	TYPE	NAME	SIZE	PBR (Stage1)	BootFile (Stage 2)	UEFI BootFile
	disk0s1	EFI		209 MB	Apple EFI
	disk0s2	Apple_HFS	HD	511 GB

/dev/disk1

ST3000DM001-9YN166 Media | 3 TB | GUID_partition_scheme | MBR boot code detected: Unknown (If you know, please report). | View Disk Sectors

ACTV	DEVICE	TYPE	NAME	SIZE	PBR (Stage1)	BootFile (Stage 2)	UEFI BootFile
	disk1s1	EFI		209 MB	Apple EFI
	disk1s2	Apple_HFS	3TB	3 TB

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Disk & Volume UIDs

View UIDs.txt File

Device Name Volume UUID GUID

disk0s1 /Volumes/EFI 5439EFC5-94CF-416F-8ABC-6EA6EAE9D64A

disk0s2 /Volumes/HD 4EBCB81C-223B-3E61-97DD-16BA2FAA8EF4 CEF9EC9D-ED00-4610-BD5C-AFC1F807D624

disk1s1 /Volumes/EFI 4B776C1A-3C19-470A-915B-6FC19461BBD8

disk1s2 /Volumes/3TB 108FED85-4693-34EF-A079-A327DDDC0D51 1D8F7BF0-C04B-4207-85C1-C0CDBF7F05AA

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Firmware Memory Map

Script: FirmwareMemoryMap (formerly showbootermemorymap) by Amit Singh. Revised by bcc9, then by dmazar.

View FirmwareMemoryMap.txt File

BootArgs: Version=2, Revision=0, at 0xffffff8002490000

CommandLine: slide=0 nvda_drv=1

Video: baseAddr=0xb9000000, display=1, rowBytes=5120, width=1280, height=1024, depth=32

DevTree: addr=0x2495000, length=0xf054

Kernel image: kaddr=0x100000, ksize=0xc104000

EFI Runtime: Mode=64, PageStart=0x24cb (0x24cb000), PageCount=0x9d37, SystemTable=0x2d83f18

MemoryMap: Size=0x570, DescriptorSize=48, DescriptorVersion=1

Type Physical Start - Physical End Number of Pages Virtual Start Attribute

BS_code 0000000000000000 - 000000000009efff 000000000000009f 0000000000000000 000000000000000f

ACPI_NVS 000000000009f000 - 000000000009ffff 0000000000000001 0000000000000000 0000000000000000

available 0000000000100000 - 000000005d7befff 000000000005d6bf 0000000000000000 000000000000000f

reserved 000000005d7bf000 - 000000005d82bfff 000000000000006d 0000000000000000 000000000000000f

ACPI_recl 000000005d82c000 - 000000005d82dfff 0000000000000002 0000000000000000 000000000000000f

reserved 000000005d82e000 - 000000005d9ecfff 00000000000001bf 0000000000000000 000000000000000f

ACPI_recl 000000005d9ed000 - 000000005d9edfff 0000000000000001 0000000000000000 000000000000000f

ACPI_NVS 000000005d9ee000 - 000000005db27fff 000000000000013a 0000000000000000 000000000000000f

ACPI_NVS 000000005db28000 - 000000005dbc6fff 000000000000009f 0000000000000000 000000000000000f

ACPI_NVS 000000005dbc7000 - 000000005dbc9fff 0000000000000003 0000000000000000 000000000000000f

ACPI_NVS 000000005dbca000 - 000000005ded2fff 0000000000000309 0000000000000000 000000000000000f

available 000000005ded3000 - 000000005e441fff 000000000000056f ffffff80024cb000 000000000000000f

available 000000005e442000 - 000000005e6ebfff 00000000000002aa ffffff8002a3a000 000000000000000f

available 000000005e6ec000 - 000000005e6edfff 0000000000000002 ffffff8002ce4000 000000000000000f

available 000000005e6ee000 - 000000005e78bfff 000000000000009e ffffff8002ce6000 000000000000000f

available 000000005e78c000 - 000000005e7b1fff 0000000000000026 ffffff8002d84000 000000000000000f

available 000000005e7b2000 - 000000005e84cfff 000000000000009b ffffff8002daa000 000000000000000f

BS_data 000000005e84d000 - 000000005e84dfff 0000000000000001 0000000000000000 000000000000000f

ACPI_NVS 000000005e84e000 - 000000005e890fff 0000000000000043 0000000000000000 000000000000000f

BS_data 000000005e891000 - 000000005f427fff 0000000000000b97 0000000000000000 000000000000000f

available 000000005f428000 - 000000005f7d9fff 00000000000003b2 ffffff8002e45000 000000000000000f

BS_data 000000005f7da000 - 000000005f7fffff 0000000000000026 0000000000000000 000000000000000f

MemMapIO 00000000f0000000 - 00000000f7ffffff 0000000000008000 ffffff80031f7000 8000000000000001

MemMapIO 00000000fec00000 - 00000000fec00fff 0000000000000001 ffffff800b1f7000 8000000000000001

MemMapIO 00000000fed00000 - 00000000fed03fff 0000000000000004 ffffff800b1f8000 8000000000000001

MemMapIO 00000000fed1c000 - 00000000fed1ffff 0000000000000004 ffffff800b1fc000 8000000000000001

MemMapIO 00000000fee00000 - 00000000fee00fff 0000000000000001 ffffff800b200000 8000000000000001

MemMapIO 00000000ff000000 - 00000000ffffffff 0000000000001000 ffffff800b201000 8000000000000001

available 0000000100000000 - 000000089effffff 000000000079f000 0000000000000000 000000000000000f

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IOreg

I/O Kit Registry - Dumped using OS X's BSD ioreg binary

The dumps are very large and deemed not sensible to include here - click the below links to view the files.

View IOReg.txt File

View IORegDT.txt File

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Kernel Boot Messages

Dumped using OS X's BSD dmesg binary

View Boot-Messages.txt File

PMAP: PCID enabled

PMAP: Supervisor Mode Execute Protection enabled

Darwin Kernel Version 12.5.0: Sun Sep 29 13:33:47 PDT 2013; root:xnu-2050.48.12~1/RELEASE_X86_64

vm_page_bootstrap: 8136513 free pages and 219327 wired pages

kext submap [0xffffff7f80742000 - 0xffffff8000000000], kernel text [0xffffff8000200000 - 0xffffff8000742000]

zone leak detection enabled

standard timeslicing quantum is 10000 us

standard background quantum is 2500 us

mig_table_max_displ = 74

TSC Deadline Timer supported and enabled

corecrypto kext started!

Running kernel space in FIPS MODE

Plist hmac value is 735d392b68241ef173d81097b1c8ce9ba283521626d1c973ac376838c466757d

Computed hmac value is 735d392b68241ef173d81097b1c8ce9ba283521626d1c973ac376838c466757d

corecrypto.kext FIPS integrity POST test passed!

corecrypto.kext FIPS AES CBC POST test passed!

corecrypto.kext FIPS TDES CBC POST test passed!

corecrypto.kext FIPS AES ECB AESNI POST test passed!

corecrypto.kext FIPS AES XTS AESNI POST test passed!

corecrypto.kext FIPS SHA POST test passed!

corecrypto.kext FIPS HMAC POST test passed!

corecrypto.kext FIPS ECDSA POST test passed!

corecrypto.kext FIPS DRBG POST test passed!

corecrypto.kext FIPS POST passed!

AppleACPICPU: ProcessorId=1 LocalApicId=0 Enabled

AppleACPICPU: ProcessorId=2 LocalApicId=2 Enabled

AppleACPICPU: ProcessorId=3 LocalApicId=4 Enabled

AppleACPICPU: ProcessorId=4 LocalApicId=6 Enabled

AppleACPICPU: ProcessorId=5 LocalApicId=1 Enabled

AppleACPICPU: ProcessorId=6 LocalApicId=3 Enabled

AppleACPICPU: ProcessorId=7 LocalApicId=5 Enabled

AppleACPICPU: ProcessorId=8 LocalApicId=7 Enabled

calling mpo_policy_init for TMSafetyNet

Security policy loaded: Safety net for Time Machine (TMSafetyNet)

calling mpo_policy_init for Sandbox

Security policy loaded: Seatbelt sandbox policy (Sandbox)

calling mpo_policy_init for Quarantine

Security policy loaded: Quarantine policy (Quarantine)

MAC Framework successfully initialized

using 16384 buffer headers and 10240 cluster IO buffer headers

IOAPIC: Version 0x20 Vectors 64:87

ACPI: sleep states S3 S4 S5

pci build Sep 29 2013 13:35:16, flags 0x23008, pfm64 (36 cpu) 0xf80000000, 0x80000000

AppleIntelCPUPowerManagement: Turbo Ratios 4444

AppleIntelCPUPowerManagement: (built 13:50:43 Sep 29 2013) initialization complete

[ PCI configuration begin ]

console relocated to 0xf89000000

[ PCI configuration end, bridges 6, devices 13 ]

HDAEnabler: 05/05/2008 Added SP-Audio support by Taruga

HDAEnabler: 03/07/2009 Compiled for 32/64-bit by Taruga

HDAEnabler: 05/05/2008 Added SP-Audio support by Taruga

HDAEnabler: 03/07/2009 Compiled for 32/64-bit by Taruga

FireWire runtime power conservation disabled. (3)

mbinit: done [128 MB total pool size, (85/42) split]

Pthread support ABORTS when sync kernel primitives misused

rooting via boot-uuid from /chosen: 4EBCB81C-223B-3E61-97DD-16BA2FAA8EF4

com.apple.AppleFSCompressionTypeZlib kmod start

Waiting on <dict ID="0"><key>IOProviderClass</key><string ID="1">IOResources</string><key>IOResourceMatch</key><string ID="2">boot-uuid-media</string></dict>

com.apple.AppleFSCompressionTypeDataless kmod start

com.apple.AppleFSCompressionTypeZlib load succeeded

com.apple.AppleFSCompressionTypeDataless load succeeded

AppleIntelCPUPowerManagementClient: ready

Got boot device = IOService:/AppleACPIPlatformExpert/PCI0@0/AppleACPIPCI/SAT0@1F,2/AppleIntelPchSeriesAHCI/SPT0@0/IOAHCIDevice@0/AppleAHCIDiskDriver/IOAHCIBlockStorageDevice/IOBlockStorageDriver/M4-CT512M4SSD1 Media/IOGUIDPartitionScheme/HD@2

BSD root: disk0s2, major 1, minor 2

jnl: unknown-dev: replay_journal: from: 14168576 to: 15688192 (joffset 0xee7000)

Intel82574L::start - Built May 1 2013 18:08:56 -- running on device at b109 d0 f0

jnl: unknown-dev: journal replay done.

Kernel is LP64

FireWire (OHCI) TI ID 823f PCI now active, GUID 902b3400003bcf19; max speed s800.

hfs: Removed 52 orphaned / unlinked files and 3 directories

Intel82574L: Ethernet address 94:de:80:a0:85:58

Intel82574L::setLinkStatus - not active 1face000, 0

jnl: disk1s2: replay_journal: from: 202321920 to: 212758528 (joffset 0x2bae000)

Waiting for DSMOS...

Intel82574L::setLinkStatus - not active 1face000, 0

SMC::smcReadKeyAction ERROR $Num kSMCKeyNotFound(0x84) fKeyHashTable=0x0

Previous Shutdown Cause: 3

SMC::smcInitHelper ERROR: MMIO regMap == NULL - fall back to old SMC mode

HDAEnabler: 05/05/2008 Added SP-Audio support by Taruga

HDAEnabler: 03/07/2009 Compiled for 32/64-bit by Taruga

HDAEnabler: 05/05/2008 Added SP-Audio support by Taruga

HDAEnabler: 03/07/2009 Compiled for 32/64-bit by Taruga

NVDAStartup: Web

[IOBluetoothHCIController][start] -- completed

NVDAGF100HAL loaded and registered

DSMOS has arrived

WARNING: IOPlatformPluginUtil : getCPUIDInfo: this is an unknown CPU model 0x3a

-- power management may be incomplete or unsupported

macx_swapon SUCCESS

fsevents: watcher bzserv (pid: 103) - Using /dev/fsevents directly is unsupported. Migrate to FSEventsFramework

Sandbox: sandboxd(119) deny mach-lookup com.apple.coresymbolicationd

Intel82574L::setLinkStatus - not active 1face000, 0

jnl: disk1s2: journal replay done.

hfs: Removed 21 orphaned / unlinked files and 1 directories

ast_pending=0xffffff80002a7c20

cpu_interrupt=0xffffff80002bff20

vboxdrv: fAsync=0 offMin=0x2a6c offMax=0x5002

VBoxDrv: version 4.2.18 r88780; IOCtl version 0x1a0005; IDC version 0x10000; dev major=33

VBoxDrv: vmx_resume=ffffff80002cc250 vmx_suspend=ffffff80002cc220 vmx_use_count=ffffff80008cd7a8 (0) cr4=0x1606e0

VBoxFltDrv: version 4.2.18 r88780

VBoxAdpDrv: version 4.2.18 r88780

Intel82574L::timeoutHandler - no link - reset the chipset once 1face000, 0

Intel82574L::setLinkStatus - not active 1face000, 0

Ethernet [Intel82574L]: Link up on en0, 100-Megabit, Full-duplex, Symmetric flow-control, Debug [796d,6f68,0de1,0200,cde1,4000]

Intel82574L::setLinkStatus - active 1face000, 8

**** [IOBluetoothHCIController][SearchForTransportEventTimeOutHandler] -- Missing Bluetooth Controller Transport!

utun_ctl_connect: creating interface utun0

utun_ctl_connect: creating interface utun1

Resetting IOCatalogue.

considerRebuildOfPrelinkedKernel prebuild rebuild has expired

CODE SIGNING: cs_invalid_page(0x1000): p=474[ksadmin] clearing CS_VALID

CODE SIGNING: cs_invalid_page(0x1000): p=499[ksadmin] clearing CS_VALID

CODE SIGNING: cs_invalid_page(0x1000): p=502[ksadmin] clearing CS_VALID

CODE SIGNING: cs_invalid_page(0x1000): p=509[ksadmin] clearing CS_VALID

fsevents: watcher dbfseventsd (pid: 524) - Using /dev/fsevents directly is unsupported. Migrate to FSEventsFramework

0 [Level 7] [ReadUID 0] [Facility messagetracer] [com.apple.message.domain com.apple.kernel.external_modification] [com.apple.message.signature FinderLoadBundle(1D9130A5-07F4-87C1-4134-B93DE4B9065B)] [com.apple.message.signature2 Finder(5AF2416D-6AF0-386F-86D5-A276C74780E6)] [com.apple.message.result noop]

0 [Level 7] [ReadUID 0] [Facility messagetracer] [com.apple.message.domain com.apple.kernel.external_modification] [com.apple.message.signature Google Drive Ico(1C7A9987-B796-3811-931C-C74D4DE76549)] [com.apple.message.signature2 Finder(5AF2416D-6AF0-386F-86D5-A276C74780E6)] [com.apple.message.result noop]

Limiting icmp unreach response from 347 to 250 packets per second

Sandbox: sandboxd(725) deny mach-lookup com.apple.coresymbolicationd

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Kernel Info

Dumped using: uname -v, sysctl -a | grep cpu, sysctl -a | grep hw

View Kernel-Info.txt File

Darwin Kernel Version 12.5.0: Sun Sep 29 13:33:47 PDT 2013; root:xnu-2050.48.12~1/RELEASE_X86_64

hw.ncpu = 8

hw.cpufrequency = 3900000000

hw.availcpu = 8

kern.setthread_cpupercent: 0

hw.ncpu: 8

hw.activecpu: 8

hw.physicalcpu: 4

hw.physicalcpu_max: 4

hw.logicalcpu: 8

hw.logicalcpu_max: 8

hw.cputype: 7

hw.cpusubtype: 4

hw.cpu64bit_capable: 1

hw.cpufamily: 526772277

hw.cpufrequency: 3900000000

hw.cpufrequency_min: 3900000000

hw.cpufrequency_max: 3900000000

hw.cputhreadtype: 1

machdep.cpu.max_basic: 13

machdep.cpu.max_ext: 2147483656

machdep.cpu.vendor: GenuineIntel

machdep.cpu.brand_string: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz

machdep.cpu.family: 6

machdep.cpu.model: 58

machdep.cpu.extmodel: 3

machdep.cpu.extfamily: 0

machdep.cpu.stepping: 9

machdep.cpu.feature_bits: 3219913727 2140857279

machdep.cpu.leaf7_feature_bits: 641

machdep.cpu.extfeature_bits: 672139520 1

machdep.cpu.signature: 198313

machdep.cpu.brand: 0

machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 PCLMULQDQ DTES64 MON DSCPL VMX EST TM2 SSSE3 CX16 TPR PDCM SSE4.1 SSE4.2 POPCNT AES PCID XSAVE OSXSAVE TSCTMR AVX1.0 RDRAND F16C

machdep.cpu.leaf7_features: RDWRFSGS SMEP ENFSTRG

machdep.cpu.extfeatures: SYSCALL XD EM64T LAHF RDTSCP TSCI

machdep.cpu.logical_per_package: 16

machdep.cpu.cores_per_package: 8

machdep.cpu.microcode_version: 25

machdep.cpu.processor_flag: 1

machdep.cpu.mwait.linesize_min: 64

machdep.cpu.mwait.linesize_max: 64

machdep.cpu.mwait.extensions: 3

machdep.cpu.mwait.sub_Cstates: 4384

machdep.cpu.thermal.sensor: 1

machdep.cpu.thermal.dynamic_acceleration: 1

machdep.cpu.thermal.invariant_APIC_timer: 1

machdep.cpu.thermal.thresholds: 2

machdep.cpu.thermal.ACNT_MCNT: 1

machdep.cpu.thermal.core_power_limits: 1

machdep.cpu.thermal.fine_grain_clock_mod: 1

machdep.cpu.thermal.package_thermal_intr: 1

machdep.cpu.thermal.hardware_feedback: 0

machdep.cpu.thermal.energy_policy: 1

machdep.cpu.xsave.extended_state: 7 832 832 0

machdep.cpu.arch_perf.version: 3

machdep.cpu.arch_perf.number: 4

machdep.cpu.arch_perf.width: 48

machdep.cpu.arch_perf.events_number: 7

machdep.cpu.arch_perf.events: 0

machdep.cpu.arch_perf.fixed_number: 3

machdep.cpu.arch_perf.fixed_width: 48

machdep.cpu.cache.linesize: 64

machdep.cpu.cache.L2_associativity: 8

machdep.cpu.cache.size: 256

machdep.cpu.tlb.inst.small: 64

machdep.cpu.tlb.inst.large: 8

machdep.cpu.tlb.data.small: 64

machdep.cpu.tlb.data.large: 32

machdep.cpu.tlb.shared: 512

machdep.cpu.address_bits.physical: 36

machdep.cpu.address_bits.virtual: 48

machdep.cpu.core_count: 4

machdep.cpu.thread_count: 8

machdep.xcpm.cpu_wakeup_energy_cost_selector: 0

hw.machine = x86_64

hw.model = MacPro3,1

hw.ncpu = 8

hw.byteorder = 1234

hw.physmem = 2147483648

hw.usermem = 140546048

hw.pagesize = 4096

hw.epoch = 0

hw.vectorunit = 1

hw.busfrequency = 100000000

hw.cpufrequency = 3900000000

hw.cachelinesize = 64

hw.l1icachesize = 32768

hw.l1dcachesize = 32768

hw.l2settings = 1

hw.l2cachesize = 262144

hw.l3settings = 1

hw.l3cachesize = 8388608

hw.tbfrequency = 1000000000

hw.memsize = 34359738368

hw.availcpu = 8

net.link.ether.inet.apple_hwcksum_tx: 1

net.link.ether.inet.apple_hwcksum_rx: 1

hw.ncpu: 8

hw.byteorder: 1234

hw.memsize: 34359738368

hw.activecpu: 8

hw.physicalcpu: 4

hw.physicalcpu_max: 4

hw.logicalcpu: 8

hw.logicalcpu_max: 8

hw.cputype: 7

hw.cpusubtype: 4

hw.cpu64bit_capable: 1

hw.cpufamily: 526772277

hw.cacheconfig: 8 2 2 8 0 0 0 0 0 0

hw.cachesize: 34359738368 32768 262144 8388608 0 0 0 0 0 0

hw.pagesize: 4096

hw.busfrequency: 100000000

hw.busfrequency_min: 100000000

hw.busfrequency_max: 100000000

hw.cpufrequency: 3900000000

hw.cpufrequency_min: 3900000000

hw.cpufrequency_max: 3900000000

hw.cachelinesize: 64

hw.l1icachesize: 32768

hw.l1dcachesize: 32768

hw.l2cachesize: 262144

hw.l3cachesize: 8388608

hw.tbfrequency: 1000000000

hw.packages: 1

hw.optional.floatingpoint: 1

hw.optional.mmx: 1

hw.optional.sse: 1

hw.optional.sse2: 1

hw.optional.sse3: 1

hw.optional.supplementalsse3: 1

hw.optional.sse4_1: 1

hw.optional.sse4_2: 1

hw.optional.x86_64: 1

hw.optional.aes: 1

hw.optional.avx1_0: 1

hw.optional.rdrand: 1

hw.optional.f16c: 1

hw.optional.enfstrg: 1

hw.optional.fma: 0

hw.optional.avx2_0: 0

hw.optional.bmi1: 0

hw.optional.bmi2: 0

hw.optional.rtm: 0

hw.optional.hle: 0

hw.cputhreadtype: 1

machdep.pmap.hashwalks: 359992

Top
ACPI
Dev Props
DiskUtil
UIDs
Partitions
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Mem Map
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LPSCI
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NVRAM
OpenCL
RTC
SMBIOS
SMC
Sys Prof

Kexts

Non Apple Kexts : 6

Terminal command issued: kextstat -l | egrep -v "com.apple"

IDX	REFS	ADDRESS	SIZE	WIRED	NAME	VERSION	LINKED AGAINST
29	0	0xffffff7f8204c000	0xa000		org.netkas.FakeSMC	(1.0.0d1)	<9 7 5 4 3>
93	3	0xffffff7f82056000	0x43000		org.virtualbox.kext.VBoxDrv	(4.2.18)	<7 5 4 3 1>
94	0	0xffffff7f82099000	0x8000		org.virtualbox.kext.VBoxUSB	(4.2.18)	<93 48 30 7 5 4 3 1>
95	0	0xffffff7f820a1000	0x5000		org.virtualbox.kext.VBoxNetFlt	(4.2.18)	<93 7 5 4 3 1>
96	0	0xffffff7f820a6000	0x6000		org.virtualbox.kext.VBoxNetAdp	(4.2.18)	<93 5 4 1>
99	0	0xffffff7f820ac000	0x4000		com.coresystems.driver.DirectHW	(1.3)	<7 5 4 3>

Apple Kexts : 86

Terminal command issued: kextstat -l | egrep "com.apple"

IDX	REFS	ADDRESS	SIZE	WIRED	NAME	VERSION	LINKED AGAINST
1	62	0xffffff7f80757000	0x686c		com.apple.kpi.bsd	(12.5.0)
2	6	0xffffff7f80742000	0x46c		com.apple.kpi.dsep	(12.5.0)
3	79	0xffffff7f80761000	0x1b7ec		com.apple.kpi.iokit	(12.5.0)
4	85	0xffffff7f8074d000	0x99f8		com.apple.kpi.libkern	(12.5.0)
5	73	0xffffff7f80743000	0x88c		com.apple.kpi.mach	(12.5.0)
6	35	0xffffff7f80744000	0x502c		com.apple.kpi.private	(12.5.0)
7	53	0xffffff7f8074a000	0x23cc		com.apple.kpi.unsupported	(12.5.0)
8	0	0xffffff7f816f5000	0x41000		com.apple.kec.corecrypto	(1.0)	<7 6 5 4 3 1>
9	16	0xffffff7f811d7000	0x9000		com.apple.iokit.IOACPIFamily	(1.4)	<7 6 4 3>
10	22	0xffffff7f80851000	0x2d000		com.apple.iokit.IOPCIFamily	(2.8)	<7 6 5 4 3>
11	1	0xffffff7f81fbe000	0x60000		com.apple.driver.AppleACPIPlatform	(1.8)	<10 9 7 6 5 4 3 1>
12	1	0xffffff7f80f48000	0xe000		com.apple.driver.AppleKeyStore	(28.21)	<7 6 5 4 3 1>
13	3	0xffffff7f8077d000	0x2d000		com.apple.iokit.IOStorageFamily	(1.8)	<7 6 5 4 3 1>
14	0	0xffffff7f81255000	0x1e000		com.apple.driver.DiskImages	(345)	<13 7 6 5 4 3 1>
15	0	0xffffff7f81d1b000	0x2e000		com.apple.driver.AppleIntelCPUPowerManagement	(214.0.0)	<7 6 5 4 3 1>
16	0	0xffffff7f8075e000	0x3000		com.apple.security.TMSafetyNet	(7)	<7 6 5 4 2 1>
17	2	0xffffff7f807f3000	0x4000		com.apple.kext.AppleMatch	(1.0.0d1)	<4 1>
18	1	0xffffff7f807f7000	0x11000		com.apple.security.sandbox	(220.3)	<17 7 6 5 4 3 2 1>
19	0	0xffffff7f80808000	0x6000		com.apple.security.quarantine	(2.1)	<18 17 7 6 5 4 2 1>
20	0	0xffffff7f8202f000	0x8000		com.apple.nke.applicationfirewall	(4.0.39)	<7 6 5 4 3 1>
21	0	0xffffff7f81d16000	0x3000		com.apple.driver.AppleIntelCPUPowerManagementClient	(214.0.0)	<7 6 5 4 3 1>
22	0	0xffffff7f81f92000	0x3000		com.apple.driver.AppleAPIC	(1.7)	<4 3>
23	0	0xffffff7f81b9a000	0x4000		com.apple.driver.AppleSMBIOS	(1.9)	<7 4 3>
24	0	0xffffff7f81d74000	0x3000		com.apple.driver.AppleHPET	(1.8)	<9 7 5 4 3>
25	0	0xffffff7f81bc6000	0x8000		com.apple.driver.AppleRTC	(1.5)	<9 5 4 3 1>
26	1	0xffffff7f81f6d000	0x5000		com.apple.driver.AppleEFIRuntime	(2.0)	<7 6 5 4 3>
27	4	0xffffff7f80f56000	0x80000		com.apple.iokit.IOHIDFamily	(1.8.1)	<12 7 6 5 4 3 2 1>
28	0	0xffffff7f82028000	0x4000		com.apple.driver.AppleACPIButtons	(1.8)	<27 11 9 7 6 5 4 3 1>
30	9	0xffffff7f80ec7000	0x6a000		com.apple.iokit.IOUSBFamily	(635.4.0)	<10 7 5 4 3 1>
31	0	0xffffff7f80fe6000	0x1d000		com.apple.driver.AppleUSBXHCI	(635.4.0)	<30 10 7 5 4 3 1>
32	0	0xffffff7f81060000	0x18000		com.apple.driver.AppleUSBEHCI	(621.4.6)	<30 10 7 5 4 3 1>
34	0	0xffffff7f81f72000	0xa000		com.apple.driver.AppleEFINVRAM	(2.0)	<26 7 6 5 4 3>
35	2	0xffffff7f8140d000	0x19000		com.apple.iokit.IOAHCIFamily	(2.5.1)	<5 4 3 1>
36	0	0xffffff7f81f97000	0x1a000		com.apple.driver.AppleAHCIPort	(2.6.6)	<35 10 5 4 3 1>
37	3	0xffffff7f80e88000	0x32000		com.apple.iokit.IONetworkingFamily	(3.0)	<7 6 5 4 3 1>
38	0	0xffffff7f81226000	0x10000		com.apple.driver.Intel82574L	(2.3.0b5)	<37 10 5 4 3 1>
40	2	0xffffff7f80dc9000	0x84000		com.apple.iokit.IOFireWireFamily	(4.5.5)	<5 4 3 1>
41	0	0xffffff7f812b0000	0x27000		com.apple.driver.AppleFWOHCI	(4.9.9)	<40 10 7 6 5 4 3 1>
42	0	0xffffff7f81433000	0x17000		com.apple.iokit.IOAHCIBlockStorage	(2.3.5)	<35 13 6 5 4 3 1>
43	0	0xffffff7f81a33000	0x3000		com.apple.driver.XsanFilter	(404)	<13 5 4 3 1>
44	0	0xffffff7f81745000	0x9000		com.apple.BootCache	(34)	<7 6 5 4 3 1>
45	0	0xffffff7f81f5e000	0x4000		com.apple.AppleFSCompression.AppleFSCompressionTypeZlib	(1.0.0d1)	<6 4 3 2 1>
46	0	0xffffff7f81f64000	0x3000		com.apple.AppleFSCompression.AppleFSCompressionTypeDataless	(1.0.0d1)	<7 6 4 3 2 1>
48	1	0xffffff7f80f45000	0x3000		com.apple.iokit.IOUSBUserClient	(630.4.4)	<30 7 5 4 3 1>
49	0	0xffffff7f81044000	0x15000		com.apple.driver.AppleUSBHub	(635.4.0)	<30 5 4 3 1>
50	1	0xffffff7f80fdf000	0x7000		com.apple.driver.AppleUSBComposite	(621.4.0)	<30 4 3 1>
51	0	0xffffff7f8103d000	0x7000		com.apple.driver.AppleUSBMergeNub	(621.4.6)	<50 30 4 3 1>
52	1	0xffffff7f80fd6000	0x9000		com.apple.iokit.IOUSBHIDDriver	(623.4.0)	<30 27 5 4 3 1>
53	1	0xffffff7f81ab8000	0x7000		com.apple.driver.AppleHIDKeyboard	(170.2.4)	<27 4 3>
54	0	0xffffff7f81d9b000	0x4000		com.apple.driver.AppleUSBHIDKeyboard	(170.2.4)	<53 52 27 4 3>
56	11	0xffffff7f80894000	0x43000		com.apple.iokit.IOGraphicsFamily	(2.3.7)	<10 7 5 4 3>
57	0	0xffffff7f81ca1000	0x61000		com.apple.driver.AppleIntelFramebufferCapri	(8.1.6)	<56 10 9 7 6 5 4 3 1>
59	0	0xffffff7f812a0000	0x10000		com.apple.iokit.IOFireWireIP	(2.2.5)	<40 37 5 4 3 1>
60	3	0xffffff7f811e0000	0xa000		com.apple.driver.IOPlatformPluginFamily	(5.4.1d13)	<9 7 6 5 4 3>
61	1	0xffffff7f811ea000	0x14000		com.apple.driver.IOPlatformPluginLegacy	(1.0.0)	<60 9 7 6 5 4 3>
62	2	0xffffff7f811fe000	0x11000		com.apple.driver.AppleSMC	(3.1.5d4)	<9 7 5 4 3>
63	0	0xffffff7f8120f000	0x10000		com.apple.driver.ACPI_SMC_PlatformPlugin	(1.0.0)	<62 61 60 10 9 7 6 5 4 3>
64	5	0xffffff7f808d7000	0x14000		com.apple.iokit.IONDRVSupport	(2.3.7)	<56 10 7 5 4 3>
65	1	0xffffff7f81f4a000	0x3000		com.apple.driver.AppleGraphicsControl	(3.4.5)	<64 56 10 9 7 5 4 3 1>
66	0	0xffffff7f81f4d000	0xc000		com.apple.driver.ApplePolicyControl	(3.4.5)	<65 64 56 10 9 7 5 4 3 1>
67	0	0xffffff7f81c6c000	0x3000		com.apple.driver.AppleLPC	(1.6.3)	<60 10 5 4 3>
68	2	0xffffff7f81da5000	0xf000		com.apple.iokit.IOHDAFamily	(2.3.7fc4)	<5 4 3 1>
69	1	0xffffff7f81db8000	0x16000		com.apple.driver.AppleHDAController	(2.3.7fc4)	<68 56 10 6 5 4 3 1>
70	0	0xffffff7f8160c000	0x5000		com.apple.Dont_Steal_Mac_OS_X	(7.0.0)	<62 7 4 3 1>
71	0	0xffffff7f81330000	0xa9000		com.apple.iokit.IOBluetoothFamily	(4.1.7f4)	<30 7 5 4 3 1>
72	0	0xffffff7f81165000	0x14000		com.apple.iokit.IOSurface	(86.0.4)	<7 5 4 3 1>
73	0	0xffffff7f80eba000	0x7000		com.apple.iokit.IOUserEthernet	(1.0.0d1)	<37 6 5 4 3 1>
74	2	0xffffff7f808eb000	0x291000		com.apple.NVDAResmanWeb	(8.1.7)	<64 56 10 5 4 3 1>
75	0	0xffffff7f80b7c000	0x1ee000		com.apple.nvidia.gf100halWeb	(8.1.7)	<74 10 4 3>
76	0	0xffffff7f814f2000	0xcc000		com.apple.GeForceWeb	(8.1.7)	<74 64 56 10 7 6 5 4 3 1>
77	1	0xffffff7f81179000	0x4000		com.apple.iokit.IOSMBusFamily	(1.1)	<5 4 3>
78	1	0xffffff7f81c24000	0x11000		com.apple.driver.AppleSMBusController	(1.0.11d1)	<77 10 9 5 4 3>
79	0	0xffffff7f81c35000	0xd000		com.apple.driver.AppleMCCSControl	(1.1.11)	<78 56 10 9 7 5 4 3 1>
80	0	0xffffff7f81a88000	0x5000		com.apple.driver.AppleUpstreamUserClient	(3.5.12)	<56 10 9 7 5 4 3 1>
81	2	0xffffff7f81760000	0xe000		com.apple.kext.OSvKernDSPLib	(1.12)	<5 4>
82	3	0xffffff7f8176e000	0x37000		com.apple.iokit.IOAudioFamily	(1.9.2fc7)	<81 5 4 3 1>
83	1	0xffffff7f81dce000	0xc2000		com.apple.driver.DspFuncLib	(2.3.7fc4)	<82 81 6 5 4 3 1>
84	0	0xffffff7f81e90000	0x7d000		com.apple.driver.AppleHDA	(2.3.7fc4)	<83 82 69 68 64 56 6 5 4 3 1>
87	0	0xffffff7f8080f000	0x31000		com.apple.iokit.IOSCSIArchitectureModelFamily	(3.5.6)	<5 4 3 1>
88	1	0xffffff7f8130b000	0x11000		com.apple.iokit.IOSerialFamily	(10.0.6)	<7 6 5 4 3 1>
89	0	0xffffff7f8131c000	0xa000		com.apple.iokit.IOBluetoothSerialManager	(4.1.7f4)	<88 7 5 4 3 1>
90	1	0xffffff7f81750000	0x5000		com.apple.kext.triggers	(1.0)	<7 6 5 4 3 1>
91	0	0xffffff7f81755000	0x9000		com.apple.filesystems.autofs	(3.0)	<90 7 6 5 4 3 1>
92	0	0xffffff7f81d4c000	0x5000		com.apple.driver.AppleHWSensor	(1.9.5d0)	<5 4 3>
97	0	0xffffff7f817a5000	0x5000		com.apple.driver.AudioAUUC	(1.60)	<82 56 10 9 7 5 4 3 1>
100	0	0xffffff7f820b0000	0xe000		com.apple.filesystems.msdosfs	(1.8.1)	<7 5 4 1>

Top
ACPI
Dev Props
DiskUtil
UIDs
Partitions
Loader Config
Mem Map
IOreg
Kernel dmesg
Kernel Info
Kexts
LPSCI
Misc
NVRAM
OpenCL
RTC
SMBIOS
SMC
Sys Prof

LSPCI (PCI vendor & device codes)

-nnvvt (Tree) - Dumped using pciutils v3.1.9 by Martin Mares. OS X port by THe KiNG.

View lspcitree.txt File

-[0000:00]-+-00.0 Intel Corporation Xeon E3-1200 v2/3rd Gen Core processor DRAM Controller [8086:0150]

+-01.0-[01]--+-00.0 NVIDIA Corporation GF114 [GeForce GTX 560 Ti] [10de:1200]

| \-00.1 NVIDIA Corporation GF114 HDMI Audio Controller [10de:0e0c]

+-14.0 Intel Corporation 7 Series/C210 Series Chipset Family USB xHCI Host Controller [8086:1e31]

+-16.0 Intel Corporation 7 Series/C210 Series Chipset Family MEI Controller #1 [8086:1e3a]

+-1a.0 Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #2 [8086:1e2d]

+-1b.0 Intel Corporation 7 Series/C210 Series Chipset Family High Definition Audio Controller [8086:1e20]

+-1c.0-[70-ff]--

+-1c.4-[6d]----00.0 Intel Corporation 82574L Gigabit Network Connection [8086:10f6]

+-1c.7-[6e-6f]----00.0-[6f]----00.0 Texas Instruments XIO2213A/B/XIO2221 IEEE-1394b OHCI Controller [Cheetah Express] [104c:823f]

+-1d.0 Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #1 [8086:1e26]

+-1f.0 Intel Corporation Z77 Express Chipset LPC Controller [8086:1e44]

+-1f.2 Intel Corporation 7 Series/C210 Series Chipset Family 6-port SATA Controller [AHCI mode] [8086:1e02]

\-1f.3 Intel Corporation 7 Series/C210 Series Chipset Family SMBus Controller [8086:1e22]

-M (Map) - Dumped using pciutils v3.1.9 by Martin Mares. OS X port by THe KiNG.

View lspci_map.txt File

00:00.0 Host bridge: Intel Corporation Xeon E3-1200 v2/3rd Gen Core processor DRAM Controller (rev 09)

00:01.0 PCI bridge: Intel Corporation Xeon E3-1200 v2/3rd Gen Core processor PCI Express Root Port (rev 09)

## 00.01:0 is a bridge from 00 to 01-01

00:14.0 USB controller: Intel Corporation 7 Series/C210 Series Chipset Family USB xHCI Host Controller (rev 04)

00:16.0 Communication controller: Intel Corporation 7 Series/C210 Series Chipset Family MEI Controller #1 (rev 04)

00:1a.0 USB controller: Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #2 (rev 04)

00:1b.0 Audio device: Intel Corporation 7 Series/C210 Series Chipset Family High Definition Audio Controller (rev 04)

00:1c.0 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 1 (rev c4)

## 00.1c:0 is a bridge from 00 to 70-ff

00:1c.4 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 5 (rev c4)

## 00.1c:4 is a bridge from 00 to 6d-6d

00:1c.7 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 8 (rev c4)

## 00.1c:7 is a bridge from 00 to 6e-6f

00:1d.0 USB controller: Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #1 (rev 04)

00:1f.0 ISA bridge: Intel Corporation Z77 Express Chipset LPC Controller (rev 04)

00:1f.2 SATA controller: Intel Corporation 7 Series/C210 Series Chipset Family 6-port SATA Controller [AHCI mode] (rev 04)

00:1f.3 SMBus: Intel Corporation 7 Series/C210 Series Chipset Family SMBus Controller (rev 04)

01:00.0 VGA compatible controller: NVIDIA Corporation GF114 [GeForce GTX 560 Ti] (rev a1)

01:00.1 Audio device: NVIDIA Corporation GF114 HDMI Audio Controller (rev a1)

6d:00.0 Ethernet controller: Intel Corporation 82574L Gigabit Network Connection

6e:00.0 PCI bridge: Texas Instruments XIO2213A/B/XIO2221 PCI Express to PCI Bridge [Cheetah Express] (rev 01)

## 6e.00:0 is a bridge from 6e to 6f-6f

6f:00.0 FireWire (IEEE 1394): Texas Instruments XIO2213A/B/XIO2221 IEEE-1394b OHCI Controller [Cheetah Express] (rev 01)

Summary of buses:

00: Primary host bus

1c.7 Bridge to 6e-6f

1c.4 Bridge to 6d-6d

1c.0 Bridge to 70-ff

01.0 Bridge to 01-01

01: Entered via 00:01.0

6d: Entered via 00:1c.4

6e: Entered via 00:1c.7

00.0 Bridge to 6f-6f

6f: Entered via 6e:00.0

-nnvv - Dumped using pciutils v3.1.9 by Martin Mares. OS X port by THe KiNG.

View lspci.txt File

00:00.0 Host bridge [0600]: Intel Corporation Xeon E3-1200 v2/3rd Gen Core processor DRAM Controller [8086:0150] (rev 09)

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=0c <?>

00:01.0 PCI bridge [0604]: Intel Corporation Xeon E3-1200 v2/3rd Gen Core processor PCI Express Root Port [8086:0151] (rev 09) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Bus: primary=00, secondary=01, subordinate=01, sec-latency=0

I/O behind bridge: 0000e000-0000efff

Memory behind bridge: ec000000-ee0fffff

Prefetchable memory behind bridge: 0000000f80000000-0000000f8bffffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR- NoISA- VGA+ MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [88] Subsystem: Device [0000:0000]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [a0] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #2, Speed 8GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <8us

ClockPM- Surprise- LLActRep- BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #1, PowerLimit 75.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

00:14.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series Chipset Family USB xHCI Host Controller [8086:1e31] (rev 04) (prog-if 30 [XHCI])

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at ee400000 (64-bit, non-prefetchable)

Capabilities: [70] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] MSI: Enable+ Count=1/8 Maskable- 64bit+

Address: 00000000fee00000 Data: 4090

00:16.0 Communication controller [0780]: Intel Corporation 7 Series/C210 Series Chipset Family MEI Controller #1 [8086:1e3a] (rev 04)

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at ee41a000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [8c] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4091

00:1a.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #2 [8086:1e2d] (rev 04) (prog-if 20 [EHCI])

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at ee418000 (32-bit, non-prefetchable)

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [58] Debug port: BAR=1 offset=00a0

Capabilities: [98] PCI Advanced Features

AFCap: TP+ FLR+

AFCtrl: FLR-

AFStatus: TP-

00:1b.0 Audio device [0403]: Intel Corporation 7 Series/C210 Series Chipset Family High Definition Audio Controller [8086:1e20] (rev 04)

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Interrupt: pin A routed to IRQ 22

Region 0: Memory at ee410000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4092

Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE- FLReset+

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-

00:1c.0 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 1 [8086:1e10] (rev c4) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Bus: primary=00, secondary=70, subordinate=ff, sec-latency=0

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #1, Speed 5GT/s, Width x4, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 25.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range BC, TimeoutDis+ ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Intel Corporation Device [8086:7270]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1c.4 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 5 [8086:1e18] (rev c4) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Bus: primary=00, secondary=6d, subordinate=6d, sec-latency=0

I/O behind bridge: 0000d000-0000dfff

Memory behind bridge: ee300000-ee3fffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-

BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #5, Speed 5GT/s, Width x1, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #4, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range BC, TimeoutDis+ ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Intel Corporation Device [8086:7270]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1c.7 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 8 [8086:1e1e] (rev c4) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Bus: primary=00, secondary=6e, subordinate=6f, sec-latency=0

Memory behind bridge: ee100000-ee2fffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #8, Speed 5GT/s, Width x1, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #7, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range BC, TimeoutDis+ ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Intel Corporation Device [8086:7270]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1d.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #1 [8086:1e26] (rev 04) (prog-if 20 [EHCI])

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 23

Region 0: Memory at ee417000 (32-bit, non-prefetchable)

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [58] Debug port: BAR=1 offset=00a0

Capabilities: [98] PCI Advanced Features

AFCap: TP+ FLR+

AFCtrl: FLR-

AFStatus: TP-

00:1f.0 ISA bridge [0601]: Intel Corporation Z77 Express Chipset LPC Controller [8086:1e44] (rev 04)

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=0c <?>

00:1f.2 SATA controller [0106]: Intel Corporation 7 Series/C210 Series Chipset Family 6-port SATA Controller [AHCI mode] [8086:1e02] (rev 04) (prog-if 01 [AHCI 1.0])

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin B routed to IRQ 19

Region 0: I/O ports at f070

Region 1: I/O ports at f060

Region 2: I/O ports at f050

Region 3: I/O ports at f040

Region 4: I/O ports at f020

Region 5: Memory at ee416000 (32-bit, non-prefetchable)

Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4093

Capabilities: [70] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004

Capabilities: [b0] PCI Advanced Features

AFCap: TP+ FLR+

AFCtrl: FLR-

AFStatus: TP-

00:1f.3 SMBus [0c05]: Intel Corporation 7 Series/C210 Series Chipset Family SMBus Controller [8086:1e22] (rev 04)

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin C routed to IRQ 18

Region 0: Memory at ee415000 (64-bit, non-prefetchable) [disabled]

Region 4: I/O ports at f000

01:00.0 VGA compatible controller [0300]: NVIDIA Corporation GF114 [GeForce GTX 560 Ti] [10de:1200] (rev a1) (prog-if 00 [VGA controller])

Subsystem: eVga.com. Corp. Device [3842:1561]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at ec000000 (32-bit, non-prefetchable)

Region 1: Memory at f80000000 (64-bit, prefetchable)

Region 3: Memory at f88000000 (64-bit, prefetchable)

Region 5: I/O ports at e000

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4094

Capabilities: [78] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Not Supported, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [b4] Vendor Specific Information: Len=14 <?>

01:00.1 Audio device [0403]: NVIDIA Corporation GF114 HDMI Audio Controller [10de:0e0c] (rev a1)

Subsystem: eVga.com. Corp. Device [3842:1561]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Interrupt: pin B routed to IRQ 17

Region 0: Memory at ee080000 (32-bit, non-prefetchable)

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4095

Capabilities: [78] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Not Supported, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

6d:00.0 Ethernet controller [0200]: Intel Corporation 82574L Gigabit Network Connection [8086:10f6]

Subsystem: Intel Corporation Device [8086:0000]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Interrupt: pin A routed to IRQ 16

Region 0: Memory at ee300000 (32-bit, non-prefetchable)

Region 2: I/O ports at d000 [disabled]

Region 3: Memory at ee320000 (32-bit, non-prefetchable)

Capabilities: [c8] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-

Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4096

Capabilities: [e0] Express (v1) Endpoint, MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <64us

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

Capabilities: [a0] MSI-X: Enable- Count=5 Masked-

Vector table: BAR=3 offset=00000000

PBA: BAR=3 offset=00002000

6e:00.0 PCI bridge [0604]: Texas Instruments XIO2213A/B/XIO2221 PCI Express to PCI Bridge [Cheetah Express] [104c:823e] (rev 01) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Region 1: Memory at ee200000 (32-bit, non-prefetchable)

Bus: primary=6e, secondary=6f, subordinate=6f, sec-latency=64

Memory behind bridge: ee100000-ee1fffff

Secondary status: 66MHz+ FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Bridge: PM- B3+

Capabilities: [60] MSI: Enable- Count=1/16 Maskable- 64bit+

Address: 0000000000000000 Data: 0000

Capabilities: [80] Subsystem: Device [3412:7856]

Capabilities: [90] Express (v1) PCI/PCI-X Bridge, MSI 00

DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ BrConfRtry-

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <16us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

6f:00.0 FireWire (IEEE 1394) [0c00]: Texas Instruments XIO2213A/B/XIO2221 IEEE-1394b OHCI Controller [Cheetah Express] [104c:823f] (rev 01) (prog-if 10 [OHCI])

Subsystem: Device [3412:7856]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (500ns min, 1000ns max), Cache Line Size: 64 bytes

Interrupt: pin A routed to IRQ 19

Region 0: Memory at ee104000 (32-bit, non-prefetchable)

Region 1: Memory at ee100000 (32-bit, non-prefetchable)

Capabilities: [44] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME+

-nnvvbxxxx (Bus centric view - Extended hex dump) - Dumped using pciutils v3.1.9 by Martin Mares. OS X port by THe KiNG.

View lspci.txt File

00:00.0 Host bridge [0600]: Intel Corporation Xeon E3-1200 v2/3rd Gen Core processor DRAM Controller [8086:0150] (rev 09)

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=0c <?>

00: 86 80 50 01 06 00 90 20 09 00 00 06 00 00 00 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00

40: 01 90 d1 fe 00 00 00 00 01 00 d1 fe 00 00 00 00

50: 03 00 00 00 09 00 00 00 00 00 00 00 01 00 80 5f

60: 03 00 00 f0 00 00 00 00 01 80 d1 fe 00 00 00 00

70: 00 00 00 ff 07 00 00 00 00 0c 00 ff 7f 00 00 00

80: 10 11 11 00 00 11 11 00 1a 00 00 00 00 00 00 00

90: 01 00 00 ff 07 00 00 00 01 00 f0 9e 08 00 00 00

a0: 01 00 00 00 08 00 00 00 01 00 00 9f 08 00 00 00

b0: 01 00 00 60 01 00 00 60 01 00 80 5f 01 00 00 60

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 09 00 0c 01 9e 80 80 e2 d0 00 e0 36 00 00 00 00

f0: 00 00 00 00 00 00 00 00 c8 0f 09 00 00 00 00 00

00:01.0 PCI bridge [0604]: Intel Corporation Xeon E3-1200 v2/3rd Gen Core processor PCI Express Root Port [8086:0151] (rev 09) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Bus: primary=00, secondary=01, subordinate=01, sec-latency=0

I/O behind bridge: 0000e000-0000efff

Memory behind bridge: ec000000-ee0fffff

Prefetchable memory behind bridge: 0000000f80000000-0000000f8bffffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR- NoISA- VGA+ MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [88] Subsystem: Device [0000:0000]

Capabilities: [80] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [a0] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #2, Speed 8GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <8us

ClockPM- Surprise- LLActRep- BwNot+

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #1, PowerLimit 75.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Not Supported, TimeoutDis- ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -3.5dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

00: 86 80 51 01 07 00 10 00 09 00 04 06 10 00 81 00

10: 00 00 00 00 00 00 00 00 00 01 01 00 e0 e0 00 20

20: 00 ec 00 ee 01 80 f1 8b 0f 00 00 00 0f 00 00 00

30: 00 00 00 00 88 00 00 00 00 00 00 00 10 01 18 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0a

80: 01 90 03 c8 08 00 00 00 0d 80 00 00 00 00 00 00

90: 05 a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 10 00 42 01 01 80 00 00 00 00 00 00 03 ad 61 02

b0: 40 00 02 51 80 25 0c 00 00 00 40 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 0e 00 00 00

d0: 43 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 01 00 00 00 00 00 01 00 10 00

00:14.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series Chipset Family USB xHCI Host Controller [8086:1e31] (rev 04) (prog-if 30 [XHCI])

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at ee400000 (64-bit, non-prefetchable)

Capabilities: [70] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [80] MSI: Enable+ Count=1/8 Maskable- 64bit+

Address: 00000000fee00000 Data: 4090

00: 86 80 31 1e 06 04 90 02 04 30 03 0c 00 00 00 00

10: 04 00 40 ee 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72

30: 00 00 00 00 70 00 00 00 00 00 00 00 10 01 00 00

40: fd 0f 0e 80 39 c0 03 80 00 00 00 00 00 00 00 00

50: 17 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 30 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 01 80 c2 c1 08 00 00 00 00 00 00 00 00 00 00 00

80: 05 00 87 00 00 00 e0 fe 00 00 00 00 90 40 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 8f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 03 0c 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 0f 00 00 00 0f 00 00 00 0f 00 00 00 0f 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 87 0f 04 08 00 00 00 00

00:16.0 Communication controller [0780]: Intel Corporation 7 Series/C210 Series Chipset Family MEI Controller #1 [8086:1e3a] (rev 04)

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at ee41a000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [8c] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4091

00: 86 80 3a 1e 06 04 10 00 04 00 80 07 00 00 80 00

10: 04 a0 41 ee 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72

30: 00 00 00 00 50 00 00 00 00 00 00 00 10 01 00 00

40: 55 02 00 1e 10 00 01 80 06 01 00 66 f0 7f 00 10

50: 01 8c 03 c8 08 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 05 00 81 00

90: 00 00 e0 fe 00 00 00 00 91 40 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 02 00 00 c0

c0: 02 03 c7 9d d3 69 cc c5 07 97 d1 dc 10 f0 cb f2

d0: 65 22 5d cd 4e dc 64 a6 6f c9 fd e5 36 39 af 04

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:1a.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #2 [8086:1e2d] (rev 04) (prog-if 20 [EHCI])

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at ee418000 (32-bit, non-prefetchable)

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [58] Debug port: BAR=1 offset=00a0

Capabilities: [98] PCI Advanced Features

AFCap: TP+ FLR+

AFCtrl: FLR-

AFStatus: TP-

00: 86 80 2d 1e 06 00 90 02 04 20 03 0c 00 00 00 00

10: 00 80 41 ee 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72

30: 00 00 00 00 50 00 00 00 00 00 00 00 10 01 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00

60: 20 20 ff 07 00 00 00 00 01 00 00 01 00 20 00 40

70: 00 00 df 3f 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 80 00 11 88 0c 93 30 0d 00 24 00 00 00 00

90: 00 00 00 00 00 00 00 00 13 00 06 03 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 c4 90 37 57

f0: 00 00 00 00 88 85 80 00 87 0f 04 08 08 17 5b 20

00:1b.0 Audio device [0403]: Intel Corporation 7 Series/C210 Series Chipset Family High Definition Audio Controller [8086:1e20] (rev 04)

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Interrupt: pin A routed to IRQ 22

Region 0: Memory at ee410000 (64-bit, non-prefetchable)

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4092

Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE- FLReset+

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-

00: 86 80 20 1e 06 04 10 00 04 00 03 04 10 00 00 00

10: 04 00 41 ee 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72

30: 00 00 00 00 50 00 00 00 00 00 00 00 16 01 00 00

40: 01 00 00 05 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 60 42 c8 00 00 00 00 00 00 00 00 00 00 00 00

60: 05 70 81 00 00 00 e0 fe 00 00 00 00 92 40 00 00

70: 10 00 91 00 00 00 00 10 00 00 10 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 04 02 01 00 24 00 c0 00 0c a3 82 10 00 31 02

d0: 00 0c a3 02 10 00 31 02 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 87 0f 04 08 00 00 00 00

00:1c.0 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 1 [8086:1e10] (rev c4) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Bus: primary=00, secondary=70, subordinate=ff, sec-latency=0

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #1, Speed 5GT/s, Width x4, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x0, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+

Slot #0, PowerLimit 25.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet- Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range BC, TimeoutDis+ ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Intel Corporation Device [8086:7270]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 10 1e 07 00 10 00 c4 00 04 06 10 00 81 00

10: 00 00 00 00 00 00 00 00 00 70 ff 00 f0 00 00 20

20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 10 01 10 00

40: 10 80 42 01 00 80 00 00 00 00 10 00 42 40 12 01

50: 00 00 01 10 60 fd 04 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 16 00 00 00 00 00 00 00 00 00 00 00

70: 02 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 86 80 70 72 00 00 00 00 00 00 00 00

a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 01 02 0b 00 00 02 80 11 c1 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 87 0f 04 08 00 00 00 00

00:1c.4 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 5 [8086:1e18] (rev c4) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Bus: primary=00, secondary=6d, subordinate=6d, sec-latency=0

I/O behind bridge: 0000d000-0000dfff

Memory behind bridge: ee300000-ee3fffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-

BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #5, Speed 5GT/s, Width x1, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #4, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range BC, TimeoutDis+ ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Intel Corporation Device [8086:7270]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 18 1e 07 00 10 00 c4 00 04 06 10 00 81 00

10: 00 00 00 00 00 00 00 00 00 6d 6d 00 d0 d0 00 00

20: 30 ee 30 ee f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 10 01 10 00

40: 10 80 42 01 00 80 00 00 00 00 10 00 12 40 12 05

50: 00 00 11 70 00 b2 24 00 00 00 40 00 00 00 00 00

60: 00 00 00 00 16 00 00 00 00 00 00 00 00 00 00 00

70: 02 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 86 80 70 72 00 00 00 00 00 00 00 00

a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 01 02 0b 00 00 00 80 11 81 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 87 0f 04 08 00 00 00 00

00:1c.7 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series Chipset Family PCI Express Root Port 8 [8086:1e1e] (rev c4) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Bus: primary=00, secondary=6e, subordinate=6f, sec-latency=0

Memory behind bridge: ee100000-ee2fffff

Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [40] Express (v2) Root Port (Slot+), MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-

MaxPayload 128 bytes, MaxReadReq 128 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #8, Speed 5GT/s, Width x1, ASPM unknown, Latency L0 <1us, L1 <16us

ClockPM- Surprise- LLActRep+ BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt+ ABWMgmt-

SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise-

Slot #7, PowerLimit 10.000W; Interlock- NoCompl+

SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-

Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-

SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-

Changed: MRL- PresDet- LinkState-

RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-

RootCap: CRSVisible-

RootSta: PME ReqID 0000, PMEStatus- PMEPending-

DevCap2: Completion Timeout: Range BC, TimeoutDis+ ARIFwd-

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- ARIFwd-

LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-

Address: 00000000 Data: 0000

Capabilities: [90] Subsystem: Intel Corporation Device [8086:7270]

Capabilities: [a0] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00: 86 80 1e 1e 07 00 10 00 c4 00 04 06 10 00 81 00

10: 00 00 00 00 00 00 00 00 00 6e 6f 00 f0 00 00 20

20: 10 ee 20 ee f1 ff 01 00 00 00 00 00 00 00 00 00

30: 00 00 00 00 40 00 00 00 00 00 00 00 13 04 10 00

40: 10 80 42 01 00 80 00 00 00 00 10 00 12 40 12 08

50: 00 00 11 70 00 b2 3c 00 00 00 40 00 00 00 00 00

60: 00 00 00 00 16 00 00 00 00 00 00 00 00 00 00 00

70: 02 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 0d a0 00 00 86 80 70 72 00 00 00 00 00 00 00 00

a0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 01 02 0b 00 00 00 80 11 81 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 87 0f 04 08 00 00 00 00

00:1d.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series Chipset Family USB Enhanced Host Controller #1 [8086:1e26] (rev 04) (prog-if 20 [EHCI])

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 23

Region 0: Memory at ee417000 (32-bit, non-prefetchable)

Capabilities: [50] Power Management version 2

Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [58] Debug port: BAR=1 offset=00a0

Capabilities: [98] PCI Advanced Features

AFCap: TP+ FLR+

AFCtrl: FLR-

AFStatus: TP-

00: 86 80 26 1e 06 00 90 02 04 20 03 0c 00 00 00 00

10: 00 70 41 ee 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72

30: 00 00 00 00 50 00 00 00 00 00 00 00 17 01 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 58 c2 c9 00 00 00 00 0a 98 a0 20 00 00 00 00

60: 20 20 ff 07 00 00 00 00 01 00 00 01 00 20 00 40

70: 00 00 df 3f 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 80 00 11 88 0c 93 30 0d 00 24 00 00 00 00

90: 00 00 00 00 00 00 00 00 13 00 06 03 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 aa ff 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 08 42 0b 48 02 02 01 92 20 c0 10 40

f0: 00 00 00 00 88 85 80 00 87 0f 04 08 08 17 5b 20

00:1f.0 ISA bridge [0601]: Intel Corporation Z77 Express Chipset LPC Controller [8086:1e44] (rev 04)

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Capabilities: [e0] Vendor Specific Information: Len=0c <?>

00: 86 80 44 1e 07 00 10 02 04 00 01 06 00 00 80 00

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72

30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00

40: 01 04 00 00 80 00 00 00 01 05 00 00 10 00 00 00

50: f8 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 0b 0a 0b 05 d0 00 00 00 80 80 03 04 f8 f0 00 00

70: 78 f0 78 f0 78 f0 78 f0 78 f0 78 f0 78 f0 78 f0

80: 00 00 00 14 01 0a 3c 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 0f 00 00 00 00 00 00 00 00 00 00

a0: 08 0e a0 00 58 38 06 00 00 47 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 20 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 33 22 11 00 67 45 00 00 cf ff 00 00 08 00 00 00

e0: 09 00 0c 10 00 00 00 00 b3 02 64 04 00 00 00 00

f0: 01 c0 d1 fe 00 00 00 00 87 0f 04 08 00 00 00 00

00:1f.2 SATA controller [0106]: Intel Corporation 7 Series/C210 Series Chipset Family 6-port SATA Controller [AHCI mode] [8086:1e02] (rev 04) (prog-if 01 [AHCI 1.0])

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin B routed to IRQ 19

Region 0: I/O ports at f070

Region 1: I/O ports at f060

Region 2: I/O ports at f050

Region 3: I/O ports at f040

Region 4: I/O ports at f020

Region 5: Memory at ee416000 (32-bit, non-prefetchable)

Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-

Address: fee00000 Data: 4093

Capabilities: [70] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004

Capabilities: [b0] PCI Advanced Features

AFCap: TP+ FLR+

AFCtrl: FLR-

AFStatus: TP-

00: 86 80 02 1e 07 04 b0 02 04 01 06 01 00 00 00 00

10: 71 f0 00 00 61 f0 00 00 51 f0 00 00 41 f0 00 00

20: 21 f0 00 00 00 60 41 ee 00 00 00 00 86 80 70 72

30: 00 00 00 00 80 00 00 00 00 00 00 00 13 02 00 00

40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00

80: 05 70 01 00 00 00 e0 fe 93 40 00 00 00 00 00 00

90: 60 3c 03 83 83 01 00 3c 08 42 5c 01 00 00 00 00

a0: e0 00 00 00 39 00 39 00 12 b0 10 00 48 00 00 00

b0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 87 0f 04 08 00 00 00 00

00:1f.3 SMBus [0c05]: Intel Corporation 7 Series/C210 Series Chipset Family SMBus Controller [8086:1e22] (rev 04)

Subsystem: Intel Corporation Device [8086:7270]

Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Interrupt: pin C routed to IRQ 18

Region 0: Memory at ee415000 (64-bit, non-prefetchable) [disabled]

Region 4: I/O ports at f000

00: 86 80 22 1e 01 00 80 02 04 00 05 0c 00 00 00 00

10: 04 50 41 ee 00 00 00 00 00 00 00 00 00 00 00 00

20: 01 f0 00 00 00 00 00 00 00 00 00 00 86 80 70 72

30: 00 00 00 00 00 00 00 00 00 00 00 00 12 03 00 00

40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 03 04 04 00 00 00 08 08 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 87 0f 04 08 00 00 00 00

01:00.0 VGA compatible controller [0300]: NVIDIA Corporation GF114 [GeForce GTX 560 Ti] [10de:1200] (rev a1) (prog-if 00 [VGA controller])

Subsystem: eVga.com. Corp. Device [3842:1561]

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0

Interrupt: pin A routed to IRQ 16

Region 0: Memory at ec000000 (32-bit, non-prefetchable)

Region 1: Memory at f80000000 (64-bit, prefetchable)

Region 3: Memory at f88000000 (64-bit, prefetchable)

Region 5: I/O ports at e000

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4094

Capabilities: [78] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Not Supported, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

Capabilities: [b4] Vendor Specific Information: Len=14 <?>

00: de 10 00 12 07 04 10 00 a1 00 00 03 00 00 80 00

10: 00 00 00 ec 0c 00 00 80 0f 00 00 00 0c 00 00 88

20: 0f 00 00 00 01 e0 00 00 00 00 00 00 42 38 61 15

30: 00 00 00 00 60 00 00 00 00 00 00 00 10 01 00 00

40: 42 38 61 15 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 00 00 00 00 00 00 00 ce d6 23 00 00 00 00 00

60: 01 68 03 00 08 00 00 00 05 78 81 00 00 00 e0 fe

70: 00 00 00 00 94 40 00 00 10 b4 02 00 a0 8d 2c 01

80: 10 29 00 00 02 2d 05 00 40 01 02 11 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 10 00 00 00

a0: 00 00 00 00 00 00 00 00 01 00 01 00 00 00 00 00

b0: 00 00 00 00 09 00 14 01 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

01:00.1 Audio device [0403]: NVIDIA Corporation GF114 HDMI Audio Controller [10de:0e0c] (rev a1)

Subsystem: eVga.com. Corp. Device [3842:1561]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Interrupt: pin B routed to IRQ 17

Region 0: Memory at ee080000 (32-bit, non-prefetchable)

Capabilities: [60] Power Management version 3

Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Capabilities: [68] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4095

Capabilities: [78] Express (v2) Endpoint, MSI 00

DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us

ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #0, Speed 5GT/s, Width x16, ASPM L0s L1, Latency L0 <256ns, L1 <4us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk+

ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 5GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

DevCap2: Completion Timeout: Not Supported, TimeoutDis+

DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-

LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB

Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-

Compliance De-emphasis: -6dB

LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-

EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-

00: de 10 0c 0e 06 04 10 00 a1 00 03 04 10 00 80 00

10: 00 00 08 ee 00 00 00 00 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 42 38 61 15

30: 00 00 00 00 60 00 00 00 00 00 00 00 11 02 00 00

40: 42 38 61 15 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 ce d6 23 00 00 00 00 00

60: 01 68 03 00 08 00 00 00 05 78 81 00 00 00 e0 fe

70: 00 00 00 00 95 40 00 00 10 00 02 00 a0 8d 2c 01

80: 00 28 00 00 02 2d 05 00 48 01 02 11 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 10 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

6d:00.0 Ethernet controller [0200]: Intel Corporation 82574L Gigabit Network Connection [8086:10f6]

Subsystem: Intel Corporation Device [8086:0000]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Interrupt: pin A routed to IRQ 16

Region 0: Memory at ee300000 (32-bit, non-prefetchable)

Region 2: I/O ports at d000 [disabled]

Region 3: Memory at ee320000 (32-bit, non-prefetchable)

Capabilities: [c8] Power Management version 2

Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME-

Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+

Address: 00000000fee00000 Data: 4096

Capabilities: [e0] Express (v1) Endpoint, MSI 00

DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <64us

ClockPM- Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

Capabilities: [a0] MSI-X: Enable- Count=5 Masked-

Vector table: BAR=3 offset=00000000

PBA: BAR=3 offset=00002000

00: 86 80 f6 10 06 04 10 00 00 00 00 02 10 00 00 00

10: 00 00 30 ee 00 00 00 00 01 d0 00 00 00 00 32 ee

20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 00 00

30: 00 00 00 00 c8 00 00 00 00 00 00 00 10 01 00 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 11 00 04 00 03 00 00 00 03 20 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 01 d0 22 c8 00 20 00 0f

d0: 05 e0 81 00 00 00 e0 fe 00 00 00 00 96 40 00 00

e0: 10 a0 01 00 c1 8c 00 00 00 28 10 00 11 1c 03 00

f0: 00 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00

6e:00.0 PCI bridge [0604]: Texas Instruments XIO2213A/B/XIO2221 PCI Express to PCI Bridge [Cheetah Express] [104c:823e] (rev 01) (prog-if 00 [Normal decode])

Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 0, Cache Line Size: 64 bytes

Region 1: Memory at ee200000 (32-bit, non-prefetchable)

Bus: primary=6e, secondary=6f, subordinate=6f, sec-latency=64

Memory behind bridge: ee100000-ee1fffff

Secondary status: 66MHz+ FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-

BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-

PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-

Capabilities: [50] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)

Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-

Bridge: PM- B3+

Capabilities: [60] MSI: Enable- Count=1/16 Maskable- 64bit+

Address: 0000000000000000 Data: 0000

Capabilities: [80] Subsystem: Device [3412:7856]

Capabilities: [90] Express (v1) PCI/PCI-X Bridge, MSI 00

DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us

ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-

DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-

RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+ BrConfRtry-

MaxPayload 128 bytes, MaxReadReq 512 bytes

DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-

LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <1us, L1 <16us

ClockPM+ Surprise- LLActRep- BwNot-

LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-

ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-

LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-

00: 4c 10 3e 82 07 00 10 00 01 00 04 06 10 00 01 00

10: 00 00 00 00 00 00 20 ee 6e 6f 6f 40 f1 01 a0 22

20: 10 ee 10 ee f1 ff 01 00 00 00 00 00 00 00 00 00

30: ff 00 00 00 50 00 00 00 00 00 00 00 ff 00 10 00

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

50: 01 60 03 06 08 00 40 00 00 00 00 00 00 00 00 00

60: 05 80 88 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 0d 90 00 00 12 34 56 78 00 00 00 00 00 00 00 00

90: 10 00 71 00 02 80 90 05 00 28 01 00 11 4c 06 00

a0: 00 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 08 00 00 ff 00 00 00 00 00 00 00 00 00

c0: 00 00 00 6e 08 01 12 00 40 20 14 32 00 00 00 00

d0: 12 34 56 78 5f 02 00 86 00 00 00 00 40 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

6f:00.0 FireWire (IEEE 1394) [0c00]: Texas Instruments XIO2213A/B/XIO2221 IEEE-1394b OHCI Controller [Cheetah Express] [104c:823f] (rev 01) (prog-if 10 [OHCI])

Subsystem: Device [3412:7856]

Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

Latency: 64 (500ns min, 1000ns max), Cache Line Size: 64 bytes

Interrupt: pin A routed to IRQ 19

Region 0: Memory at ee104000 (32-bit, non-prefetchable)

Region 1: Memory at ee100000 (32-bit, non-prefetchable)

Capabilities: [44] Power Management version 3

Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)

Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME+

00: 4c 10 3f 82 06 00 30 02 01 10 00 0c 10 40 00 00

10: 00 40 10 ee 00 00 10 ee 00 00 00 00 00 00 00 00

20: 00 00 00 00 00 00 00 00 00 00 00 00 12 34 56 78

30: 00 00 00 00 44 00 00 00 00 00 00 00 13 01 02 04

40: 00 00 00 00 01 00 03 7e 00 80 00 00 00 00 00 00

50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

f0: 90 0a 00 00 82 40 00 00 12 34 56 78 00 00 00 00

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Misc

EfiAppleNvramGuid Vars

View gEfiAppleNvramGuid_Vars.txt File

4D1EDE05-38C7-4A6A-9CC6-4BCCA8B38C14:ROM %**************X

4D1EDE05-38C7-4A6A-9CC6-4BCCA8B38C14:MLB CK84593EXYL

4D1EDE05-38C7-4A6A-9CC6-4BCCA8B38C14:FirmwareFeatures %17%14%00%80

4D1EDE05-38C7-4A6A-9CC6-4BCCA8B38C14:FirmwareFeaturesMask 7%ff%03%c0

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:BootCurrent %01%00

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:BootOptionSupport %01%00%00%00

8BE4DF61-93CA-11D2-AA0D-00E098032B8C:BootOrder %01%00%02%00%03%00%04%00%06%00%07%00%08%00%05%00

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NVRAM

Dumped using nvram -x -p

View nvram.plist File

<?xml version="1.0" encoding="UTF-8"?>

<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">

<dict>

<key>SystemAudioVolume</key>

<data>

qg==

</data>

<key>aapl,panic-info</key>

<data>

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2Ww2m29mXKxWm4VnZhaInoeXQTFaDx4+l0HmcJ1NZ4Hk5XN6Ti/L5zrFUArTgWB4GAwG

g8FgMBwMFoPBZmIWaCiV6UAwPAwGg8FgMBgMBpPFzGYYCzSUznQgGB4Gg8FgMBgMNp6Z

yTAYjAUaSmk6EAwPg8FgMBgMBoPFbDBbGaaQBrE6EAwPg8FgMBgMBoPBYDAcDccCSYVY

HQiGN5vNZrMZB6PlcLEbDAZjgaRDrA4Ew9PIsPJtPIvZaDEbDAaLsUBSIlYHguHNZrPZ

bMbBaDZyuJarwRTSKVQHguHNZrPZbMbNwjgxWTw2w1ggqRCqA8HwZrPZbDbjZmGcmCwm

w2AskHSa1IFgeLPZbDabcTDbLGaejWEwFkhKTOpAMLzZbDabzTgYLYeL3WAwmEKK04FA

MLzZbDabzbhZGCcmi8MxHAskzelAIBjebDabzWbcLIwTk8XhGIwFksZgOhAMD4PBYDAY

DAaDwWAwGAzGAkljMR0IhofBYDAYDAaDwWAwGAwGU0hjMh0IhofBYDAYDAaDwWAwGAxm

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g8FgsnFZbCaDFDC82Ww2m824WRgnJovFZhhIB4LhzWaz2Wy+mXGxWm0WnplBChjebDab

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GCcmi80zGEgHguHNZrPZbMbBYDAbzZyrhUEKGN5sNpvNZtwsjBOTxWYcDKQDwfBms9ls

NuNgMJiNZg7jciAFDG82m81mM24WxonJYrMYBtKBYHiz2Ww2m3EwGEwmnslqN5ACBAKB

QKBlWe4us0FFPL3snqff7jko7QaJw+M1XR4el3UKEAgEAoFAIND43XaF4XB22XUsG9/y

cflaFqNwrpjrltoOjcJgcTY0tmy2Iaw1C8ZmrVwMhmsNg7TbDJazzYxFYxcIw5vNZrPZ

fDPjYjSzDAaDtXwwvNlsNpvNNzMuVhOTzWazAgQCgUAgEAgEAoHIZXjZTS67x3kdaPxu

u8JwOLvsSr/Xabor+YQOk8ZwO83Oo2QuXGprG8aINpqN2LoVa8XWjHgztoK12q0lGwqD

sxzOaMTdcF0gDG82m81m882Mg+FqMRgMpgCBQCAQCAQCgUAgchledpPL7nFeBxq/264w

HM4uu9LvdZruSj6dRKl1WofD33I6SuaauW6prTFmK8JitWIrFhQWW7MhDdYKDm+xlnBY

oxlpwiKNJit2gTC82Ww2m803Mw6GI99gMJgCBAKBQCAQCAQCgchleNlNLrvHeR1o/G67

wnA4u+xKv9dpuiv5PMrDcHR6PDeG22l2HiVzzVy31DaXk+FmMFuxNavBcK0ZUThs4WBB

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ZoOsZfk8/XaDYjJXzQXTgaZ1N2hahoNkOVBsppvNdLQbCEqkgmSw2GwHkr/fdB3eXW/J

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l8mgdRlPB4XpoBlslovVcDQZDmbTgcbvtmtdxtNdSGKw6A6L2WV5IuaCuWDkGAgVJpPl

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FcMp3vKzy12mr8NzlzG8Lk+bw0TMBXPByDGFL1gnp9/BanWYiLlsMIUvFERep2X3/C1P

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U/hCwWlTmHxOEzFXTuELBYPQ5DARc90UvlAwlBxCq9D3vSxvht3hc7lddtOH7HTZTU/I

YjQXzAVTAN3rsisMh7PT4zA9/Xab0/LyPcxmJ2gumGuWU5Di9bA87Kan3eWEzBVT+ELB

UHIIrULf97K8GXaHz+V22U1PyGI0F8wFUwDXZTzdRZenz+eyfJ6IuWAKfvI5LcvTYXbI

mIjBXDCXTcFPPqfDaTIoH6PT9PKYXpeXm29ymR0yJmaumsum8BHncGPdPWamxQmZa+a6

mcc0BT/5DNbJ6XfImIi5ci6ZeXxTANdlPN31nNqXZbmbOIUy0+JEzBWTKXyh4LQprM9D

w0TMBXPFYuSYgp98TpvC+jxkTMRcMQXQbU+T02HX2RyDwdBh9rUsTuBcMddNAXRaiUFp

ed4Ou69lcQLnirluCl8oiCQGQ8OEzDVz3cxjmoKffCKJwZAxIXPNXDfzmKbgJ5/GtLx8

TcvLSWhC5pK5agp+8jmty83hcTmBs7lgLpqCn3yGhCFjguaKuW5mmsIXCh7lYTg6PZ4P

3266/M1OzFw0V03BTz6dRKl1WofD33J6QuaauW4KfvJ5lIfh6PR4HjImZK6Z66bwhYLT

5jAxc8VcNTJN4Us+oeww3fyWt6Hs+jntZpbP4XE+EXPBXDCFL/mEssN081vehrLr57Q7

ZEzUXDRXjBybKXyhKjJJXJbz4ndYTk7EbjCXzEVT+EJBZJK4LOfF77CcnIjdYC6Zi6bg

J5/VqRCZJBLlaXtZnrDJZi6aC6bwharNsvxcdtbFCZss5qK5bApfqDp8t+HveZpeTthk

MRfNBVPwk8/qVFidl+VDdrrspidsM5iL5qIp+MmnMS0vX9PycsiYoLlqrpqCn3w6y/T7

W75Ou88hY2Lmgil8oWDRmHRapcFmQuaCKfjJZxA5TIaMCZmr5oop+MlndSoMGRO2Wc1F

c8EU/OQTmSSGjImYC+eKKXyhYNGYlNbd9HS7nJC5YArSPOwmi9/4hEwGc80UwHUZT3eF

gs0wfYxOxFwwF4wcU5CozWnYXKbnnWV64qbwEdPzdbIdPpfniRmtpuAnn6FpyJiIuXAK

Xyi4LOen9Le8nJDhXLKYwhcKBofQJJQdppvf8nYi5sIp+MkndJgMGRMyF07BTz6DQ2gy

ZEzEXDQFcF0eu8ZveXksz8Pp70TMBVMAAA==

</data>

<key>boot-gamma</key>

<data>

8CIAACgoAAAAAAAAtgAAAAAAAAANAAEB4wQCAgUIBAQpDQcHoRMODjQgGBhULyMj+D0w

MKdNPT0nXE5O121ycguQmpqQssnJ+9cNAAEB4wQCAgUIBAQpDQcHoRMODjQgGBhULyMj

+D0wMKdNPT0nXE5O121ycguQmpqQssnJ+9cNAAEB4wQCAgUIBAQpDQcHoRMODjQgGBhU

LyMj+D0wMKdNPT0nXE5O121ycguQmpqQssnJ+9c=

</data>

<key>fmm-computer-name</key>

<data>

Sm9zaHMgTWFjIFBybw==

</data>

<key>platform-uuid</key>

<data>

lALeA4AEoAWFBpTegKCFWA==

</data>

</dict>

</plist>

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RTC
SMBIOS
SMC
Sys Prof

OpenCL

Dumped using opencl by cmf from 2009

View openCLinfo.txt File

1 OpenCL platform found!

[Platform 0]

Name: Apple

Vendor: Apple

Version: OpenCL 1.2 (Apr 25 2013 18:32:06)

Profile: FULL_PROFILE

Extensions: cl_APPLE_SetMemObjectDestructor cl_APPLE_ContextLoggingFunctions cl_APPLE_clut cl_APPLE_query_kernel_names cl_APPLE_gl_sharing cl_khr_gl_event

2 OpenCL devices found!

[Device 0]

Name: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz

Vendor: Intel

Type: CPU

Device Version: OpenCL 1.2

Driver Version: 1.1

Compute Units: 8

Work Group Size: 1024

Clock: 3900 MHz

Global Memory (Total): 32768 MB

Global Memory (Host): 32768 MB

Global Memory (PCIe): 0 MB

Local Memory: 32 KB

Cache Size: 0.0625 KB

Cache Line Size: 8388608 Bytes

Available: Yes

Double-Precision: Yes

Extensions:

cl_APPLE_SetMemObjectDestructor

cl_APPLE_ContextLoggingFunctions

cl_APPLE_clut

cl_APPLE_query_kernel_names

cl_APPLE_gl_sharing

cl_khr_gl_event

cl_khr_fp64

cl_khr_global_int32_base_atomics

cl_khr_global_int32_extended_atomics

cl_khr_local_int32_base_atomics

cl_khr_local_int32_extended_atomics

cl_khr_byte_addressable_store

cl_khr_int64_base_atomics

cl_khr_int64_extended_atomics

cl_khr_3d_image_writes

cl_APPLE_fp64_basic_ops

cl_APPLE_fixed_alpha_channel_orders

[Device 1]

Name: GeForce GTX 560 Ti

Vendor: NVIDIA Corporation

Type: GPU

Device Version: OpenCL 1.1

Driver Version: 8.17.74 313.01.03f02

Compute Units: 8

Work Group Size: 1024

Clock: 1701 MHz

Global Memory: 1024 MB

Local Memory: 48 KB

Cache Size: 0 KB

Cache Line Size: 0 Bytes

Available: Yes

Double-Precision: No

Extensions:

cl_APPLE_SetMemObjectDestructor

cl_APPLE_ContextLoggingFunctions

cl_APPLE_clut

cl_APPLE_query_kernel_names

cl_APPLE_gl_sharing

cl_khr_gl_event

cl_khr_byte_addressable_store

cl_khr_global_int32_base_atomics

cl_khr_global_int32_extended_atomics

cl_khr_local_int32_base_atomics

cl_khr_local_int32_extended_atomics

cl_APPLE_fp64_basic_ops

cl_khr_3d_image_writes

Top
ACPI
Dev Props
DiskUtil
UIDs
Partitions
Loader Config
Mem Map
IOreg
Kernel dmesg
Kernel Info
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LPSCI
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SMBIOS
SMC
Sys Prof

RTC

Dumped using cmosDumperForOsx by rafirafi, revised extensively by STLVNUB

View RTCDump.txt File

CMOS Dumper V0.1.:)

DSDT has RTC Length of 4. Dumped 256 Bytes.

--------------------------------------------------

0 1 2 3 4 5 6 7 8 9 A B C D E F |

--------------------------------------------------

0|59 b7 47 f7 19 a9 03 13 11 13 26 02 50 80 00 00 |

1|00 2a 4a ad 02 7f 02 ff ff 6a 0a 5c 03 82 40 ab |

2|0a 0b 65 63 02 6e 00 82 d8 07 26 07 6b 23 09 4b |

3|ff ff 20 23 0c d6 05 93 f8 df 48 6c 0e 7b 06 5e |

4|00 00 08 10 01 28 80 00 48 00 00 00 00 00 00 00 |

5|00 00 00 00 00 00 00 00 22 8e 00 00 00 00 00 00 |

6|00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |

7|00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |

8|1b 5f 00 00 00 00 00 00 00 0a 00 00 00 00 00 00 |

9|00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |

a|00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |

b|00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |

c|00 3a 59 4b d0 96 08 4f 13 be 42 6b 53 eb c2 b4 |

d|5e 29 0a 89 43 7f db 4b 83 2e 11 01 0b d6 1a 51 |

e|9a 5e b2 4b 3f 43 73 63 10 3b 30 e2 49 6a ae da |

f|00 00 00 00 00 68 9f 2b 80 98 19 eb 9c 4f 0d 4b |

--------------------------------------------------

By observtion of the CHANGED bytes from Sleep/Wake Cycles

You MAY get some idea as to why CMOS RESET bug exists!!!!

Top
ACPI
Dev Props
DiskUtil
UIDs
Partitions
Loader Config
Mem Map
IOreg
Kernel dmesg
Kernel Info
Kexts
LPSCI
Misc
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RTC
SMBIOS
SMC
Sys Prof

SMBIOS

Dumped using smbios-reader & dmidecode v2.11b. dmidecode compiled for OS X by Slice.

View SMBIOS.txt File

# dmidecode 2.11b

Handle 0x0000, DMI type 0, 24 bytes

0000: 00 18 00 00 01 02 00 f0 03 7f 00 80 01 00 00 00

0010: 00 00 43 0f 04 06 ff ff

BIOS Information

Vendor: Apple Inc.

Version: MP31.88Z.006C.B05.0802291410

Release Date: 02/29/08

Address: 0xF0000

Runtime Size: 64 kB

ROM Size: 8192 kB

Characteristics:

Boot from CD is supported

Selectable boot is supported

ACPI is supported

USB legacy is supported

IEEE 1394 boot is supported

BIOS boot specification is supported

Function key-initiated network boot is supported

Targeted content distribution is supported

UEFI is supported

BIOS Revision: 4.6

Handle 0x0001, DMI type 1, 27 bytes

0000: 01 1b 01 00 01 02 03 04 94 02 de 03 80 04 a0 05

0010: 85 06 94 de 80 a0 85 58 06 05 06

System Information

Manufacturer: Apple Inc.

Product Name: MacPro3,1

Version: 1.0

Serial Number: C*********L

UUID: 9402DE03-8004-A005-8506-94DE80A08558

Wake-up Type: Power Switch

SKU Number: System SKU#

Family: MacPro

Handle 0x0002, DMI type 2, 17 bytes

0000: 02 11 02 00 01 02 03 04 05 0d 06 03 00 0a 00 00

0010: 00

Base Board Information

Manufacturer: Apple Inc.

Product Name: Mac-F42C88C8

Version: 1.0

Serial Number: C*********L

Asset Tag: Base Board Asset Tag#

Features:

Board is a hosting board

Board is removable

Board is replaceable

Location In Chassis: Part Component

Chassis Handle: 0x0003

Type: Motherboard

Contained Object Handles: 0

Handle 0x0003, DMI type 3, 24 bytes

0000: 03 18 03 00 01 07 02 03 04 03 03 03 03 00 00 00

0010: 00 00 00 00 00 00 00 00

Chassis Information

Manufacturer: Apple Inc.

Type: Tower

Lock: Not Present

Version: Mac-F42C88C8

Serial Number: C*********L

Asset Tag: Asset Tag#

Boot-up State: Safe

Power Supply State: Safe

Thermal State: Safe

Security Status: None

OEM Information: 0x00000000

Height: Unspecified

Number Of Power Cords: Unspecified

Contained Elements: 0

SKU Number: Not Specified

Handle 0x0004, DMI type 4, 42 bytes

0000: 04 2a 04 00 01 03 c6 02 a9 06 03 00 ff fb eb bf

0010: 03 8c 00 00 3c 0f 3c 0f 41 04 08 00 0a 00 0b 00

0020: 04 05 06 04 04 08 00 00 00 00

Processor Information

Socket Designation: CPU-A (00)

Type: Central Processor

Family: Core i7

Manufacturer: Intel

ID: A9 06 03 00 FF FB EB BF

Signature: Type 0, Family 6, Model 58, Stepping 9

Flags:

FPU (Floating-point unit on-chip)

VME (Virtual mode extension)

DE (Debugging extension)

PSE (Page size extension)

TSC (Time stamp counter)

MSR (Model specific registers)

PAE (Physical address extension)

MCE (Machine check exception)

CX8 (CMPXCHG8 instruction supported)

APIC (On-chip APIC hardware supported)

SEP (Fast system call)

MTRR (Memory type range registers)

PGE (Page global enable)

MCA (Machine check architecture)

CMOV (Conditional move instruction supported)

PAT (Page attribute table)

PSE-36 (36-bit page size extension)

CLFSH (CLFLUSH instruction supported)

DS (Debug store)

ACPI (ACPI supported)

MMX (MMX technology supported)

FXSR (FXSAVE and FXSTOR instructions supported)

SSE (Streaming SIMD extensions)

SSE2 (Streaming SIMD extensions 2)

SS (Self-snoop)

HTT (Multi-threading)

TM (Thermal monitor supported)

PBE (Pending break enabled)

Version: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz

Voltage: 1.2 V

External Clock: Unknown

Max Speed: 3900 MHz

Current Speed: 3900 MHz

Status: Populated, Enabled

Upgrade: ZIF Socket

L1 Cache Handle: 0x0008

L2 Cache Handle: 0x000A

L3 Cache Handle: 0x000B

Serial Number: N/A

Asset Tag: N/A

Part Number: N/A

Core Count: 4

Core Enabled: 4

Thread Count: 8

Characteristics: None

Handle 0x0005, DMI type 4, 42 bytes

0000: 04 2a 05 00 01 03 c6 02 a9 06 03 00 ff fb eb bf

0010: 03 8c 00 00 3c 0f 3c 0f 41 04 0c 00 0e 00 0f 00

0020: 04 05 06 04 04 08 00 00 00 00

Processor Information

Socket Designation: CPU-A (01)

Type: Central Processor

Family: Core i7

Manufacturer: Intel

ID: A9 06 03 00 FF FB EB BF

Signature: Type 0, Family 6, Model 58, Stepping 9

Flags:

FPU (Floating-point unit on-chip)

VME (Virtual mode extension)

DE (Debugging extension)

PSE (Page size extension)

TSC (Time stamp counter)

MSR (Model specific registers)

PAE (Physical address extension)

MCE (Machine check exception)

CX8 (CMPXCHG8 instruction supported)

APIC (On-chip APIC hardware supported)

SEP (Fast system call)

MTRR (Memory type range registers)

PGE (Page global enable)

MCA (Machine check architecture)

CMOV (Conditional move instruction supported)

PAT (Page attribute table)

PSE-36 (36-bit page size extension)

CLFSH (CLFLUSH instruction supported)

DS (Debug store)

ACPI (ACPI supported)

MMX (MMX technology supported)

FXSR (FXSAVE and FXSTOR instructions supported)

SSE (Streaming SIMD extensions)

SSE2 (Streaming SIMD extensions 2)

SS (Self-snoop)

HTT (Multi-threading)

TM (Thermal monitor supported)

PBE (Pending break enabled)

Version: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz

Voltage: 1.2 V

External Clock: Unknown

Max Speed: 3900 MHz

Current Speed: 3900 MHz

Status: Populated, Enabled

Upgrade: ZIF Socket

L1 Cache Handle: 0x000C

L2 Cache Handle: 0x000E

L3 Cache Handle: 0x000F

Serial Number: N/A

Asset Tag: N/A

Part Number: N/A

Core Count: 4

Core Enabled: 4

Thread Count: 8

Characteristics: None

Handle 0x0006, DMI type 4, 42 bytes

0000: 04 2a 06 00 01 03 c6 02 a9 06 03 00 ff fb eb bf

0010: 03 8c 00 00 3c 0f 3c 0f 41 04 10 00 12 00 13 00

0020: 04 05 06 04 04 08 00 00 00 00

Processor Information

Socket Designation: CPU-A (02)

Type: Central Processor

Family: Core i7

Manufacturer: Intel

ID: A9 06 03 00 FF FB EB BF

Signature: Type 0, Family 6, Model 58, Stepping 9

Flags:

FPU (Floating-point unit on-chip)

VME (Virtual mode extension)

DE (Debugging extension)

PSE (Page size extension)

TSC (Time stamp counter)

MSR (Model specific registers)

PAE (Physical address extension)

MCE (Machine check exception)

CX8 (CMPXCHG8 instruction supported)

APIC (On-chip APIC hardware supported)

SEP (Fast system call)

MTRR (Memory type range registers)

PGE (Page global enable)

MCA (Machine check architecture)

CMOV (Conditional move instruction supported)

PAT (Page attribute table)

PSE-36 (36-bit page size extension)

CLFSH (CLFLUSH instruction supported)

DS (Debug store)

ACPI (ACPI supported)

MMX (MMX technology supported)

FXSR (FXSAVE and FXSTOR instructions supported)

SSE (Streaming SIMD extensions)

SSE2 (Streaming SIMD extensions 2)

SS (Self-snoop)

HTT (Multi-threading)

TM (Thermal monitor supported)

PBE (Pending break enabled)

Version: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz

Voltage: 1.2 V

External Clock: Unknown

Max Speed: 3900 MHz

Current Speed: 3900 MHz

Status: Populated, Enabled

Upgrade: ZIF Socket

L1 Cache Handle: 0x0010

L2 Cache Handle: 0x0012

L3 Cache Handle: 0x0013

Serial Number: N/A

Asset Tag: N/A

Part Number: N/A

Core Count: 4

Core Enabled: 4

Thread Count: 8

Characteristics: None

Handle 0x0007, DMI type 4, 42 bytes

0000: 04 2a 07 00 01 03 c6 02 a9 06 03 00 ff fb eb bf

0010: 03 8c 00 00 3c 0f 3c 0f 41 04 14 00 16 00 17 00

0020: 04 05 06 04 04 08 00 00 00 00

Processor Information

Socket Designation: CPU-A (03)

Type: Central Processor

Family: Core i7

Manufacturer: Intel

ID: A9 06 03 00 FF FB EB BF

Signature: Type 0, Family 6, Model 58, Stepping 9

Flags:

FPU (Floating-point unit on-chip)

VME (Virtual mode extension)

DE (Debugging extension)

PSE (Page size extension)

TSC (Time stamp counter)

MSR (Model specific registers)

PAE (Physical address extension)

MCE (Machine check exception)

CX8 (CMPXCHG8 instruction supported)

APIC (On-chip APIC hardware supported)

SEP (Fast system call)

MTRR (Memory type range registers)

PGE (Page global enable)

MCA (Machine check architecture)

CMOV (Conditional move instruction supported)

PAT (Page attribute table)

PSE-36 (36-bit page size extension)

CLFSH (CLFLUSH instruction supported)

DS (Debug store)

ACPI (ACPI supported)

MMX (MMX technology supported)

FXSR (FXSAVE and FXSTOR instructions supported)

SSE (Streaming SIMD extensions)

SSE2 (Streaming SIMD extensions 2)

SS (Self-snoop)

HTT (Multi-threading)

TM (Thermal monitor supported)

PBE (Pending break enabled)

Version: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz

Voltage: 1.2 V

External Clock: Unknown

Max Speed: 3900 MHz

Current Speed: 3900 MHz

Status: Populated, Enabled

Upgrade: ZIF Socket

L1 Cache Handle: 0x0014

L2 Cache Handle: 0x0016

L3 Cache Handle: 0x0017

Serial Number: N/A

Asset Tag: N/A

Part Number: N/A

Core Count: 4

Core Enabled: 4

Thread Count: 8

Characteristics: None

Handle 0x0008, DMI type 7, 19 bytes

0000: 07 13 08 00 01 80 01 20 00 20 00 20 00 20 00 00

0010: 04 03 07

Cache Information

Socket Designation: Internal L1I

Configuration: Enabled, Not Socketed, Level 1

Operational Mode: Write Back

Location: Internal

Installed Size: 32 kB

Maximum Size: 32 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Instruction

Associativity: 8-way Set-associative

Handle 0x0009, DMI type 7, 19 bytes

0000: 07 13 09 00 01 80 01 20 00 20 00 20 00 20 00 00

0010: 04 04 07

Cache Information

Socket Designation: Internal L1D

Configuration: Enabled, Not Socketed, Level 1

Operational Mode: Write Back

Location: Internal

Installed Size: 32 kB

Maximum Size: 32 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Data

Associativity: 8-way Set-associative

Handle 0x000A, DMI type 7, 19 bytes

0000: 07 13 0a 00 01 81 01 00 01 00 01 20 00 20 00 00

0010: 04 05 07

Cache Information

Socket Designation: External L2

Configuration: Enabled, Not Socketed, Level 2

Operational Mode: Write Back

Location: Internal

Installed Size: 256 kB

Maximum Size: 256 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Unified

Associativity: 8-way Set-associative

Handle 0x000B, DMI type 7, 19 bytes

0000: 07 13 0b 00 01 82 01 00 20 00 20 20 00 20 00 00

0010: 04 05 08

Cache Information

Socket Designation: External L3

Configuration: Enabled, Not Socketed, Level 3

Operational Mode: Write Back

Location: Internal

Installed Size: 8192 kB

Maximum Size: 8192 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Unified

Associativity: 16-way Set-associative

Handle 0x000C, DMI type 7, 19 bytes

0000: 07 13 0c 00 01 80 01 20 00 20 00 20 00 20 00 00

0010: 04 03 07

Cache Information

Socket Designation: Internal L1I

Configuration: Enabled, Not Socketed, Level 1

Operational Mode: Write Back

Location: Internal

Installed Size: 32 kB

Maximum Size: 32 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Instruction

Associativity: 8-way Set-associative

Handle 0x000D, DMI type 7, 19 bytes

0000: 07 13 0d 00 01 80 01 20 00 20 00 20 00 20 00 00

0010: 04 04 07

Cache Information

Socket Designation: Internal L1D

Configuration: Enabled, Not Socketed, Level 1

Operational Mode: Write Back

Location: Internal

Installed Size: 32 kB

Maximum Size: 32 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Data

Associativity: 8-way Set-associative

Handle 0x000E, DMI type 7, 19 bytes

0000: 07 13 0e 00 01 81 01 00 01 00 01 20 00 20 00 00

0010: 04 05 07

Cache Information

Socket Designation: External L2

Configuration: Enabled, Not Socketed, Level 2

Operational Mode: Write Back

Location: Internal

Installed Size: 256 kB

Maximum Size: 256 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Unified

Associativity: 8-way Set-associative

Handle 0x000F, DMI type 7, 19 bytes

0000: 07 13 0f 00 01 82 01 00 20 00 20 20 00 20 00 00

0010: 04 05 08

Cache Information

Socket Designation: External L3

Configuration: Enabled, Not Socketed, Level 3

Operational Mode: Write Back

Location: Internal

Installed Size: 8192 kB

Maximum Size: 8192 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Unified

Associativity: 16-way Set-associative

Handle 0x0010, DMI type 7, 19 bytes

0000: 07 13 10 00 01 80 01 20 00 20 00 20 00 20 00 00

0010: 04 03 07

Cache Information

Socket Designation: Internal L1I

Configuration: Enabled, Not Socketed, Level 1

Operational Mode: Write Back

Location: Internal

Installed Size: 32 kB

Maximum Size: 32 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Instruction

Associativity: 8-way Set-associative

Handle 0x0011, DMI type 7, 19 bytes

0000: 07 13 11 00 01 80 01 20 00 20 00 20 00 20 00 00

0010: 04 04 07

Cache Information

Socket Designation: Internal L1D

Configuration: Enabled, Not Socketed, Level 1

Operational Mode: Write Back

Location: Internal

Installed Size: 32 kB

Maximum Size: 32 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Data

Associativity: 8-way Set-associative

Handle 0x0012, DMI type 7, 19 bytes

0000: 07 13 12 00 01 81 01 00 01 00 01 20 00 20 00 00

0010: 04 05 07

Cache Information

Socket Designation: External L2

Configuration: Enabled, Not Socketed, Level 2

Operational Mode: Write Back

Location: Internal

Installed Size: 256 kB

Maximum Size: 256 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Unified

Associativity: 8-way Set-associative

Handle 0x0013, DMI type 7, 19 bytes

0000: 07 13 13 00 01 82 01 00 20 00 20 20 00 20 00 00

0010: 04 05 08

Cache Information

Socket Designation: External L3

Configuration: Enabled, Not Socketed, Level 3

Operational Mode: Write Back

Location: Internal

Installed Size: 8192 kB

Maximum Size: 8192 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Unified

Associativity: 16-way Set-associative

Handle 0x0014, DMI type 7, 19 bytes

0000: 07 13 14 00 01 80 01 20 00 20 00 20 00 20 00 00

0010: 04 03 07

Cache Information

Socket Designation: Internal L1I

Configuration: Enabled, Not Socketed, Level 1

Operational Mode: Write Back

Location: Internal

Installed Size: 32 kB

Maximum Size: 32 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Instruction

Associativity: 8-way Set-associative

Handle 0x0015, DMI type 7, 19 bytes

0000: 07 13 15 00 01 80 01 20 00 20 00 20 00 20 00 00

0010: 04 04 07

Cache Information

Socket Designation: Internal L1D

Configuration: Enabled, Not Socketed, Level 1

Operational Mode: Write Back

Location: Internal

Installed Size: 32 kB

Maximum Size: 32 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Data

Associativity: 8-way Set-associative

Handle 0x0016, DMI type 7, 19 bytes

0000: 07 13 16 00 01 81 01 00 01 00 01 20 00 20 00 00

0010: 04 05 07

Cache Information

Socket Designation: External L2

Configuration: Enabled, Not Socketed, Level 2

Operational Mode: Write Back

Location: Internal

Installed Size: 256 kB

Maximum Size: 256 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Unified

Associativity: 8-way Set-associative

Handle 0x0017, DMI type 7, 19 bytes

0000: 07 13 17 00 01 82 01 00 20 00 20 20 00 20 00 00

0010: 04 05 08

Cache Information

Socket Designation: External L3

Configuration: Enabled, Not Socketed, Level 3

Operational Mode: Write Back

Location: Internal

Installed Size: 8192 kB

Maximum Size: 8192 kB

Supported SRAM Types:

Synchronous

Installed SRAM Type: Synchronous

Speed: Unknown

Error Correction Type: Parity

System Type: Unified

Associativity: 16-way Set-associative

Handle 0x0018, DMI type 8, 9 bytes

0000: 08 09 18 00 01 00 02 1f 1d

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: LINE_OUT

External Connector Type: Mini Jack (headphones)

Port Type: Audio Port

Handle 0x0019, DMI type 8, 9 bytes

0000: 08 09 19 00 01 00 02 1f 1d

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: LINE_OUT

External Connector Type: Mini Jack (headphones)

Port Type: Audio Port

Handle 0x001A, DMI type 8, 9 bytes

0000: 08 09 1a 00 01 00 02 1f 1d

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: SPDIF_OUT

External Connector Type: Mini Jack (headphones)

Port Type: Audio Port

Handle 0x001B, DMI type 8, 9 bytes

0000: 08 09 1b 00 01 00 02 1f 1d

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: LINE_IN

External Connector Type: Mini Jack (headphones)

Port Type: Audio Port

Handle 0x001C, DMI type 8, 9 bytes

0000: 08 09 1c 00 01 00 02 1f 1d

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: LINE_OUT

External Connector Type: Mini Jack (headphones)

Port Type: Audio Port

Handle 0x001D, DMI type 8, 9 bytes

0000: 08 09 1d 00 01 00 02 1f 1d

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: MIC

External Connector Type: Mini Jack (headphones)

Port Type: Audio Port

Handle 0x001E, DMI type 8, 9 bytes

0000: 08 09 1e 00 01 00 02 0b 1f

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: RJ-45

External Connector Type: RJ-45

Port Type: Network Port

Handle 0x001F, DMI type 8, 9 bytes

0000: 08 09 1f 00 01 00 02 12 10

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: USB1

External Connector Type: Access Bus (USB)

Port Type: USB

Handle 0x0020, DMI type 8, 9 bytes

0000: 08 09 20 00 01 00 02 12 10

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: USB2

External Connector Type: Access Bus (USB)

Port Type: USB

Handle 0x0021, DMI type 8, 9 bytes

0000: 08 09 21 00 01 00 02 12 10

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: USB30_1

External Connector Type: Access Bus (USB)

Port Type: USB

Handle 0x0022, DMI type 8, 9 bytes

0000: 08 09 22 00 01 00 02 12 10

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: USB30_2

External Connector Type: Access Bus (USB)

Port Type: USB

Handle 0x0023, DMI type 8, 9 bytes

0000: 08 09 23 00 01 00 02 ff 1c

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: HDMI

External Connector Type: Other

Port Type: Video Port

Handle 0x0024, DMI type 8, 9 bytes

0000: 08 09 24 00 01 00 02 ff 1c

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: DVI-D

External Connector Type: Other

Port Type: Video Port

Handle 0x0025, DMI type 8, 9 bytes

0000: 08 09 25 00 01 00 02 ff ff

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: MDP1

External Connector Type: Other

Port Type: Other

Handle 0x0026, DMI type 8, 9 bytes

0000: 08 09 26 00 01 00 02 ff ff

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: MDP2

External Connector Type: Other

Port Type: Other

Handle 0x0027, DMI type 8, 9 bytes

0000: 08 09 27 00 01 00 02 21 11

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: 1394A

External Connector Type: IEEE 1394

Port Type: Firewire (IEEE P1394)

Handle 0x0028, DMI type 8, 9 bytes

0000: 08 09 28 00 01 00 02 12 10

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: USB3

External Connector Type: Access Bus (USB)

Port Type: USB

Handle 0x0029, DMI type 8, 9 bytes

0000: 08 09 29 00 01 00 02 12 10

Port Connector Information

Internal Reference Designator: None

Internal Connector Type: None

External Reference Designator: USB4

External Connector Type: Access Bus (USB)

Port Type: USB

Handle 0x002A, DMI type 8, 9 bytes

0000: 08 09 2a 00 01 ff 02 00 1d

Port Connector Information

Internal Reference Designator: F_AUDIO

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Audio Port

Handle 0x002B, DMI type 8, 9 bytes

0000: 08 09 2b 00 01 ff 02 00 1d

Port Connector Information

Internal Reference Designator: SPDIF_O

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Audio Port

Handle 0x002C, DMI type 8, 9 bytes

0000: 08 09 2c 00 01 ff 02 00 1d

Port Connector Information

Internal Reference Designator: SPDIF_I

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Audio Port

Handle 0x002D, DMI type 8, 9 bytes

0000: 08 09 2d 00 01 ff 02 00 ff

Port Connector Information

Internal Reference Designator: SYS_FAN2

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Other

Handle 0x002E, DMI type 8, 9 bytes

0000: 08 09 2e 00 01 ff 02 00 ff

Port Connector Information

Internal Reference Designator: TPM

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Other

Handle 0x002F, DMI type 8, 9 bytes

0000: 08 09 2f 00 01 ff 02 00 11

Port Connector Information

Internal Reference Designator: F1_1394B

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Firewire (IEEE P1394)

Handle 0x0030, DMI type 8, 9 bytes

0000: 08 09 30 00 01 ff 02 00 11

Port Connector Information

Internal Reference Designator: F2_1394B

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Firewire (IEEE P1394)

Handle 0x0031, DMI type 8, 9 bytes

0000: 08 09 31 00 01 ff 02 00 10

Port Connector Information

Internal Reference Designator: F_USB3

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: USB

Handle 0x0032, DMI type 8, 9 bytes

0000: 08 09 32 00 01 ff 02 00 10

Port Connector Information

Internal Reference Designator: F_USB2

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: USB

Handle 0x0033, DMI type 8, 9 bytes

0000: 08 09 33 00 01 ff 02 00 10

Port Connector Information

Internal Reference Designator: F_USB1

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: USB

Handle 0x0034, DMI type 8, 9 bytes

0000: 08 09 34 00 01 ff 02 00 ff

Port Connector Information

Internal Reference Designator: F_PANEL

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Other

Handle 0x0035, DMI type 8, 9 bytes

0000: 08 09 35 00 01 ff 02 00 ff

Port Connector Information

Internal Reference Designator: CLR_CMOS

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Other

Handle 0x0036, DMI type 8, 9 bytes

0000: 08 09 36 00 01 22 02 00 20

Port Connector Information

Internal Reference Designator: SATA2_2

Internal Connector Type: SAS/SATA Plug Receptacle

External Reference Designator: None

External Connector Type: None

Port Type: SATA

Handle 0x0037, DMI type 8, 9 bytes

0000: 08 09 37 00 01 22 02 00 20

Port Connector Information

Internal Reference Designator: SATA2_3

Internal Connector Type: SAS/SATA Plug Receptacle

External Reference Designator: None

External Connector Type: None

Port Type: SATA

Handle 0x0038, DMI type 8, 9 bytes

0000: 08 09 38 00 01 22 02 00 20

Port Connector Information

Internal Reference Designator: SATA2_4

Internal Connector Type: SAS/SATA Plug Receptacle

External Reference Designator: None

External Connector Type: None

Port Type: SATA

Handle 0x0039, DMI type 8, 9 bytes

0000: 08 09 39 00 01 22 02 00 20

Port Connector Information

Internal Reference Designator: SATA2_5

Internal Connector Type: SAS/SATA Plug Receptacle

External Reference Designator: None

External Connector Type: None

Port Type: SATA

Handle 0x003A, DMI type 8, 9 bytes

0000: 08 09 3a 00 01 22 02 00 20

Port Connector Information

Internal Reference Designator: SATA3_0

Internal Connector Type: SAS/SATA Plug Receptacle

External Reference Designator: None

External Connector Type: None

Port Type: SATA

Handle 0x003B, DMI type 8, 9 bytes

0000: 08 09 3b 00 01 22 02 00 20

Port Connector Information

Internal Reference Designator: SATA3_1

Internal Connector Type: SAS/SATA Plug Receptacle

External Reference Designator: None

External Connector Type: None

Port Type: SATA

Handle 0x003C, DMI type 8, 9 bytes

0000: 08 09 3c 00 01 ff 02 00 ff

Port Connector Information

Internal Reference Designator: SYS_FAN1

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Other

Handle 0x003D, DMI type 8, 9 bytes

0000: 08 09 3d 00 01 ff 02 00 10

Port Connector Information

Internal Reference Designator: F_USB30

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: USB

Handle 0x003E, DMI type 8, 9 bytes

0000: 08 09 3e 00 01 ff 02 00 ff

Port Connector Information

Internal Reference Designator: ATX_PWR

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Other

Handle 0x003F, DMI type 8, 9 bytes

0000: 08 09 3f 00 01 ff 02 00 ff

Port Connector Information

Internal Reference Designator: ATX_12V

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Other

Handle 0x0040, DMI type 8, 9 bytes

0000: 08 09 40 00 01 ff 02 00 ff

Port Connector Information

Internal Reference Designator: CPU_FAN

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Other

Handle 0x0041, DMI type 8, 9 bytes

0000: 08 09 41 00 01 ff 02 00 ff

Port Connector Information

Internal Reference Designator: DAJP1

Internal Connector Type: Other

External Reference Designator: None

External Connector Type: None

Port Type: Other

Handle 0x0042, DMI type 9, 17 bytes

0000: 09 11 42 00 01 a5 0d 04 04 01 00 04 06 00 00 00

0010: 08

System Slot Information

Designation: Slot-1

Type: x16 PCI Express

Current Usage: In Use

Length: Long

ID: 1

Characteristics:

3.3 V is provided

Hot-plug devices are supported

SMBus signal is supported

Bus Address: 0000:00:01.0

Handle 0x0043, DMI type 9, 17 bytes

0000: 09 11 43 00 01 a5 08 03 03 02 00 04 06 00 00 00

0010: e5

System Slot Information

Designation: Slot-2

Type: x1 PCI Express

Current Usage: Available

Length: Short

ID: 2

Characteristics:

3.3 V is provided

Hot-plug devices are supported

SMBus signal is supported

Bus Address: 0000:00:1c.5

Handle 0x0044, DMI type 9, 17 bytes

0000: 09 11 44 00 01 a5 08 03 03 03 00 04 06 00 00 00

0010: e6

System Slot Information

Designation: Slot-3

Type: x1 PCI Express

Current Usage: Available

Length: Short

ID: 3

Characteristics:

3.3 V is provided

Hot-plug devices are supported

SMBus signal is supported

Bus Address: 0000:00:1c.6

Handle 0x0045, DMI type 9, 17 bytes

0000: 09 11 45 00 01 a5 0b 03 04 04 00 04 06 00 00 00

0010: 09

System Slot Information

Designation: Slot-4

Type: x8 PCI Express

Current Usage: Available

Length: Long

ID: 4

Characteristics:

3.3 V is provided

Hot-plug devices are supported

SMBus signal is supported

Bus Address: 0000:00:01.1

Handle 0x0046, DMI type 9, 17 bytes

0000: 09 11 46 00 01 06 05 03 04 05 00 04 07 ff 00 02

0010: 18

System Slot Information

Designation: Thunderbolt Slot 1

Type: 32-bit PCI

Current Usage: Available

Length: Long

ID: 5

Characteristics:

3.3 V is provided

PME signal is supported

Hot-plug devices are supported

SMBus signal is supported

Bus Address: 00ff:02:03.0

Handle 0x0047, DMI type 9, 17 bytes

0000: 09 11 47 00 01 06 05 03 04 06 00 04 07 ff 00 02

0010: 20

System Slot Information

Designation: Thunderbolt Slot 2

Type: 32-bit PCI

Current Usage: Available

Length: Long

ID: 6

Characteristics:

3.3 V is provided

PME signal is supported

Hot-plug devices are supported

SMBus signal is supported

Bus Address: 00ff:02:04.0

Handle 0x0048, DMI type 9, 17 bytes

0000: 09 11 48 00 01 06 05 03 04 07 00 04 07 ff 00 02

0010: 28

System Slot Information

Designation: Thunderbolt Slot 3

Type: 32-bit PCI

Current Usage: Available

Length: Long

ID: 7

Characteristics:

3.3 V is provided

PME signal is supported

Hot-plug devices are supported

SMBus signal is supported

Bus Address: 00ff:02:05.0

Handle 0x0049, DMI type 9, 17 bytes

0000: 09 11 49 00 01 06 05 03 04 08 00 04 07 ff 00 02

0010: 30

System Slot Information

Designation: Thunderbolt Slot 4

Type: 32-bit PCI

Current Usage: Available

Length: Long

ID: 8

Characteristics:

3.3 V is provided

PME signal is supported

Hot-plug devices are supported

SMBus signal is supported

Bus Address: 00ff:02:06.0

Handle 0x004A, DMI type 10, 6 bytes

0000: 0a 06 4a 00 03 01

On Board Device Information

Type: Video

Status: Disabled

Description: Video Controller

Handle 0x004B, DMI type 13, 22 bytes

0000: 0d 16 4b 00 01 00 00 00 00 00 00 00 00 00 00 00

0010: 00 00 00 00 00 01

BIOS Language Information

Installable Languages: 1

en|US|iso8859-1

Currently Installed Language: en|US|iso8859-1

Handle 0x004C, DMI type 16, 23 bytes

0000: 10 17 4c 00 03 03 03 00 00 00 02 ff ff 04 00 00

0010: 00 00 00 00 00 00 00

Physical Memory Array

Location: System Board Or Motherboard

Use: System Memory

Error Correction Type: None

Maximum Capacity: 32 GB

Error Information Handle: No Error

Number Of Devices: 4

Handle 0x004D, DMI type 17, 34 bytes

0000: 11 22 4d 00 4c 00 ff ff 40 00 40 00 00 20 09 00

0010: 01 02 18 80 00 40 06 03 04 06 05 02 00 00 00 00

0020: 40 06

Memory Device

Array Handle: 0x004C

Error Information Handle: No Error

Total Width: 64 bits

Data Width: 64 bits

Size: 8192 MB

Form Factor: DIMM

Set: None

Locator: ChannelB-DIMM1

Bank Locator: BANK 3

Type: DDR3

Type Detail: Synchronous

Speed: 1600 MHz (0.6 ns)

Manufacturer: Crucial Technology

Serial Number: A60C32D8

Asset Tag: N/A

Part Number: BLT8G3D1608ET3LX0.

Rank: 2

Configured Clock Speed: 1600 MHz (0.6 ns)

Handle 0x004E, DMI type 20, 35 bytes

0000: 14 23 4e 00 00 00 80 01 ff ff ff 01 4d 00 4c 00

0010: ff 02 02 00 00 80 01 00 00 00 00 00 00 00 00 00

0020: 00 00 00

Memory Device Mapped Address

Starting Address: 0x00600000000

Ending Address: 0x007FFFFFFFF

Range Size: 8 GB

Physical Device Handle: 0x004D

Memory Array Mapped Address Handle: 0x004C

Partition Row Position: Unknown

Interleave Position: 2

Interleaved Data Depth: 2

Handle 0x004F, DMI type 17, 34 bytes

0000: 11 22 4f 00 4c 00 ff ff 40 00 40 00 00 20 09 00

0010: 01 02 18 80 00 40 06 03 04 06 05 02 00 00 00 00

0020: 40 06

Memory Device

Array Handle: 0x004C

Error Information Handle: No Error

Total Width: 64 bits

Data Width: 64 bits

Size: 8192 MB

Form Factor: DIMM

Set: None

Locator: ChannelA-DIMM1

Bank Locator: BANK 1

Type: DDR3

Type Detail: Synchronous

Speed: 1600 MHz (0.6 ns)

Manufacturer: Crucial Technology

Serial Number: A3122661

Asset Tag: N/A

Part Number: BLT8G3D1608ET3LX0.

Rank: 2

Configured Clock Speed: 1600 MHz (0.6 ns)

Handle 0x0050, DMI type 20, 35 bytes

0000: 14 23 50 00 00 00 00 01 ff ff 7f 01 4f 00 4c 00

0010: ff 01 02 00 00 00 01 00 00 00 00 00 00 00 00 00

0020: 00 00 00

Memory Device Mapped Address

Starting Address: 0x00400000000

Ending Address: 0x005FFFFFFFF

Range Size: 8 GB

Physical Device Handle: 0x004F

Memory Array Mapped Address Handle: 0x004C

Partition Row Position: Unknown

Interleave Position: 1

Interleaved Data Depth: 2

Handle 0x0051, DMI type 17, 34 bytes

0000: 11 22 51 00 4c 00 ff ff 40 00 40 00 00 20 09 00

0010: 01 02 18 80 00 40 06 03 04 06 05 02 00 00 00 00

0020: 40 06

Memory Device

Array Handle: 0x004C

Error Information Handle: No Error

Total Width: 64 bits

Data Width: 64 bits

Size: 8192 MB

Form Factor: DIMM

Set: None

Locator: ChannelB-DIMM0

Bank Locator: BANK 2

Type: DDR3

Type Detail: Synchronous

Speed: 1600 MHz (0.6 ns)

Manufacturer: Crucial Technology

Serial Number: A31226E6

Asset Tag: N/A

Part Number: BLT8G3D1608ET3LX0.

Rank: 2

Configured Clock Speed: 1600 MHz (0.6 ns)

Handle 0x0052, DMI type 20, 35 bytes

0000: 14 23 52 00 00 00 80 00 ff ff ff 00 51 00 4c 00

0010: ff 02 02 00 00 80 00 00 00 00 00 00 00 00 00 00

0020: 00 00 00

Memory Device Mapped Address

Starting Address: 0x00200000000

Ending Address: 0x003FFFFFFFF

Range Size: 8 GB

Physical Device Handle: 0x0051

Memory Array Mapped Address Handle: 0x004C

Partition Row Position: Unknown

Interleave Position: 2

Interleaved Data Depth: 2

Handle 0x0053, DMI type 17, 34 bytes

0000: 11 22 53 00 4c 00 ff ff 40 00 40 00 00 20 09 00

0010: 01 02 18 80 00 40 06 03 04 06 05 02 00 00 00 00

0020: 40 06

Memory Device

Array Handle: 0x004C

Error Information Handle: No Error

Total Width: 64 bits

Data Width: 64 bits

Size: 8192 MB

Form Factor: DIMM

Set: None

Locator: ChannelA-DIMM0

Bank Locator: BANK 0

Type: DDR3

Type Detail: Synchronous

Speed: 1600 MHz (0.6 ns)

Manufacturer: Crucial Technology

Serial Number: A31226EB

Asset Tag: N/A

Part Number: BLT8G3D1608ET3LX0.

Rank: 2

Configured Clock Speed: 1600 MHz (0.6 ns)

Handle 0x0054, DMI type 20, 35 bytes

0000: 14 23 54 00 00 00 00 00 ff ff 7f 00 53 00 4c 00

0010: ff 01 02 00 00 00 00 00 00 00 00 00 00 00 00 00

0020: 00 00 00

Memory Device Mapped Address

Starting Address: 0x00000000000

Ending Address: 0x001FFFFFFFF

Range Size: 8 GB

Physical Device Handle: 0x0053

Memory Array Mapped Address Handle: 0x004C

Partition Row Position: Unknown

Interleave Position: 1

Interleaved Data Depth: 2

Handle 0x0055, DMI type 19, 31 bytes

0000: 13 1f 55 00 00 00 00 00 ff ff ff 01 4c 00 04 00

0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Memory Array Mapped Address

Starting Address: 0x00000000000

Ending Address: 0x007FFFFFFFF

Range Size: 32 GB

Physical Array Handle: 0x004C

Partition Width: 4

Handle 0x0056, DMI type 32, 11 bytes

0000: 20 0b 56 00 00 00 00 00 00 00 00

System Boot Information

Status: No errors detected

Handle 0x0057, DMI type 41, 11 bytes

0000: 29 0b 57 00 01 03 01 00 00 00 10

Onboard Device

Reference Designation: Video Controller

Type: Video

Status: Disabled

Type Instance: 1

Bus Address: 0000:00:02.0

Handle 0x0058, DMI type 41, 11 bytes

0000: 29 0b 58 00 01 87 01 00 00 00 d8

Onboard Device

Reference Designation: Azalia Audio Codec

Type: Sound

Status: Enabled

Type Instance: 1

Bus Address: 0000:00:1b.0

Handle 0x0059, DMI type 41, 11 bytes

0000: 29 0b 59 00 01 85 01 00 00 00 e4

Onboard Device

Reference Designation: Ethernet Controller

Type: Ethernet

Status: Enabled

Type Instance: 1

Bus Address: 0000:00:1c.4

Handle 0x005A, DMI type 41, 11 bytes

0000: 29 0b 5a 00 01 89 01 00 00 00 fa

Onboard Device

Reference Designation: Sata Controller

Type: SATA Controller

Status: Enabled

Type Instance: 1

Bus Address: 0000:00:1f.2

Handle 0x005B, DMI type 41, 11 bytes

0000: 29 0b 5b 00 01 81 01 00 00 00 a0

Onboard Device

Reference Designation: xHCI Controller

Type: Other

Status: Enabled

Type Instance: 1

Bus Address: 0000:00:14.0

Handle 0x005C, DMI type 41, 11 bytes

0000: 29 0b 5c 00 01 81 01 00 00 00 e7

Onboard Device

Reference Designation: 1394 Controller

Type: Other

Status: Enabled

Type Instance: 1

Bus Address: 0000:00:1c.7

Handle 0x005D, DMI type 128, 88 bytes

0000: 80 58 5d 00 01 00 00 00 17 14 00 80 37 ff 03 c0

0010: 02 00 00 00 00 00 00 00 00 00 ec ff ff ff ff ff

0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

0050: 00 00 00 00 00 00 00 00

Apple specific FirmwareVolume

FirmwareFeatures: 80001417

FirmwareFeaturesMask: c003ff37

Region Type:02 Start:ffec0000 End:ffffffff

Handle 0x005E, DMI type 131, 6 bytes

0000: 83 06 5e 00 01 07

Apple specific Processor Type

cpu=0701

Handle 0x005F, DMI type 127, 4 bytes

0000: 7f 04 5f 00

End Of Table

Top
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RTC
SMBIOS
SMC
Sys Prof

SMC

SMC Keys. Dumped using SMC_util2 (Former Apple System Management Control (SMC) tool 0.01) by usr-sse2.

View SMC-keys.txt File

Num: b0=0 b1=0 b2=0 b3=11 size=4

#KEY [ui8 ] (bytes 00 00 00 11)

ACID [ch8*] (bytes ba be 3c 45 c0 03 10 43)

CLKH [{clh] (bytes 00 00 70 80 00 01 19 40)

CLKT [ui32] 128 (bytes 00 00 ca 80)

FNum [ui8 ] (bytes 00)

LSOF [flag] (bytes 01)

LSSB [{lso] (bytes 01 01)

MOST [ui16] 3 (bytes 80 03)

MSPS [{msp] (bytes 00)

MSSD [si8 ] (bytes 03)

NATJ [ui8 ] (bytes 00)

NTOK [ui8 ] (bytes 01)

NVPR [ui8 ] (bytes 00)

OSK0 [ch8*] (bytes 6f 75 72 68 61 72 64 77 6f 72 6b 62 79 74 68 65 73 65 77 6f 72 64 73 67 75 61 72 64 65 64 70 6c)

OSK1 [ch8*] (bytes 65 61 73 65 64 6f 6e 74 73 74 65 61 6c 28 63 29 41 70 70 6c 65 43 6f 6d 70 75 74 65 72 49 6e 63)

REV [{rev] (bytes 01 30 0f 00 00 03)

NATi [ui16] 0 (bytes 00 00)

SMC Fans. Dumped using SMC_util2 (Former Apple System Management Control (SMC) tool 0.01) by usr-sse2.

View SMC-fans.txt File

Total fans in system: 0

Top
ACPI
Dev Props
DiskUtil
UIDs
Partitions
Loader Config
Mem Map
IOreg
Kernel dmesg
Kernel Info
Kexts
LPSCI
Misc
NVRAM
OpenCL
RTC
SMBIOS
SMC
Sys Prof

System Profiler

Dumped using /usr/sbin/system_profiler -detailLevel mini

View System-Profiler.txt File

Audio:

Intel High Definition Audio:

Audio ID: 1

Speaker:

Connection: 1/8-Inch Jack

Line Output:

Connection: 1/8-Inch Jack

Line Output:

Connection: 1/8-Inch Jack

Internal Microphone:

Connection: Internal

Line Input:

Connection: 1/8-Inch Jack

Line Input:

Connection: 1/8-Inch Jack

Headphone:

Connection: 1/8-Inch Jack

S/PDIF Optical Digital Audio Output:

Connection: Combination Output

Intel High Definition Audio:

Audio ID: 1

HDMI / DisplayPort Output:

Connection: Display

Devices:

AirPlay:

Manufacturer: Apple Inc.

Output Channels: 2

Current SampleRate: 44100

Transport: AirPlay

Built-in Input:

Default Input Device: Yes

Input Channels: 2

Manufacturer: Apple Inc.

Current SampleRate: 44100

Transport: Built-in

Built-in Line Input:

Input Channels: 2

Manufacturer: Apple Inc.

Current SampleRate: 44100

Transport: Built-in

Built-in Output:

Default Output Device: Yes

Default System Output Device: Yes

Manufacturer: Apple Inc.

Output Channels: 2

Current SampleRate: 44100

Transport: Built-in

Built-in Line Output:

Manufacturer: Apple Inc.

Output Channels: 2

Current SampleRate: 44100

Transport: Built-in

Built-in Line Output:

Manufacturer: Apple Inc.

Output Channels: 2

Current SampleRate: 44100

Transport: Built-in

Built-in Digital Output:

Manufacturer: Apple Inc.

Output Channels: 2

Current SampleRate: 44100

Transport: Built-in

Diagnostics:

Power On Self-Test:

Last Run: 11/13/13 2:23 PM

Result: Passed

Ethernet Cards:

Intel Corporation 82574L Gigabit Network Connection:

Name: ethernet

Type: Ethernet Controller

Bus: PCI

Vendor ID: 0x8086

Device ID: 0x10f6

Subsystem Vendor ID: 0x8086

Subsystem ID: 0x0000

Revision ID: 0x0000

Link Width: x1

BSD name: en0

Kext name: Intel82574L.kext

Location: //System/Library/Extensions/IONetworkingFamily.kext/Contents/PlugIns/Intel82574L.kext

Version: 2.3.0b5

FireWire:

FireWire Bus:

Maximum Speed: Up to 800 Mb/sec

Graphics/Displays:

GeForce GTX 560 Ti:

Chipset Model: GeForce GTX 560 Ti

Type: GPU

Bus: PCIe

Slot: Slot-1

PCIe Lane Width: x16

VRAM (Total): 1024 MB

Vendor: NVIDIA (0x10de)

Device ID: 0x1200

Revision ID: 0x00a1

ROM Revision: 70.24.2E.00.62

Displays:

DELL ST2410:

Resolution: 1920 x 1080 @ 60 Hz

Pixel Depth: 32-Bit Color (ARGB8888)

Display Serial Number: T505R98L0FFU

Mirror: Off

Online: Yes

Rotation: Supported

SyncMaster:

Resolution: 1920 x 1200 @ 60 Hz

Pixel Depth: 32-Bit Color (ARGB8888)

Display Serial Number: HVMQ103934

Main Display: Yes

Mirror: Off

Online: Yes

Rotation: Supported

Television: Yes

Hardware:

Hardware Overview:

Model Name: Mac Pro

Model Identifier: MacPro3,1

Processor Name: Intel Core i7

Processor Speed: 3.9 GHz

Number of Processors: 1

Total Number of Cores: 4

L2 Cache (per Core): 256 KB

L3 Cache: 8 MB

Memory: 32 GB

Boot ROM Version: MP31.006C.B05

SMC Version (system): 1.30f3

Memory:

Memory Slots:

ECC: Disabled

BANK 3/ChannelB-DIMM1:

Size: 8 GB

Type: DDR3

Speed: 1600 MHz

Status: OK

Manufacturer: Crucial Technology

Part Number: BLT8G3D1608ET3LX0.

BANK 1/ChannelA-DIMM1:

Size: 8 GB

Type: DDR3

Speed: 1600 MHz

Status: OK

Manufacturer: Crucial Technology

Part Number: BLT8G3D1608ET3LX0.

BANK 2/ChannelB-DIMM0:

Size: 8 GB

Type: DDR3

Speed: 1600 MHz

Status: OK

Manufacturer: Crucial Technology

Part Number: BLT8G3D1608ET3LX0.

BANK 0/ChannelA-DIMM0:

Size: 8 GB

Type: DDR3

Speed: 1600 MHz

Status: OK

Manufacturer: Crucial Technology

Part Number: BLT8G3D1608ET3LX0.

Network:

Ethernet:

Type: Ethernet

Hardware: Ethernet

BSD Device Name: en0

Has IP Assigned: Yes

Service Order: 0

FireWire:

Type: FireWire

Hardware: FireWire

BSD Device Name: fw0

Has IP Assigned: No

Service Order: 1

Wi-Fi:

Type: AirPort

Hardware: AirPort

BSD Device Name: en1

Has IP Assigned: No

Service Order: 2

PCI Cards:

GeForce GTX 560 Ti:

Name: NVDA,Display-B

Type: Display Controller

Driver Installed: Yes

MSI: Yes

Bus: PCI

Slot: Slot-1

Vendor ID: 0x10de

Device ID: 0x1200

Subsystem Vendor ID: 0x3842

Subsystem ID: 0x0010

ROM Revision: 70.24.2E.00.62

Revision ID: 0x00a1

Link Width: x16

Link Speed: 2.5 GT/s

Printer Software:

Printers:

Path: /Library/Printers/Brother/.Versions/BRColorLaser.bundle/Contents/Info.plist

Version: 2.4.2

Path: /Library/Printers/Brother/Filter/commandtobrother.bundle/Contents/Info.plist

Version: 4.4.0

Path: /Library/Printers/Brother/Filter/rastertobrother3040.bundle/Contents/Info.plist

Version: 4.1.1

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Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJChangeBJCartridgeInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJChangeInkTankInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJCleaningInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJCustomSettingInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJInkCartridgeInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJInkInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJInkUsageControlInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeBatteryLevelInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeCartridgeInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeChangeBJCartridgeInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeChangeInkTankInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeCleaningInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeCustomSettingInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeHelpInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeInkInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeInkUsageControlInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizePaperAllocationInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizePaperSourceSettingInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizePowerSettingInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeRemainingInkLevelSettingInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeSelectInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeSilentModeInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJLocalizeTestPrintInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJPaperAllocationInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJPaperSourceSettingInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJPowerSettingInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJRemainingInkLevelSettingInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJSilentModeInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/BJPrinter/Utilities/CanonIJPrinterUtility.app/Contents/Resources/CIJTestPrintInfo.plist

Version: 10.51.7

Path: /Library/Printers/Canon/IJScanner/Frameworks/Caddis_09.framework/Versions/A/Resources/Info.plist

Version: 1.0.5

Path: /Library/Printers/Canon/IJScanner/Frameworks/SGSM5_09.framework/Versions/A/Resources/Info.plist

Version: 6.2.0

Path: /Library/Printers/Canon/IJScanner/Plugins/ag07_09.plugin/Contents/Info.plist

Version: 7.1.4

Path: /Library/Printers/Canon/IJScanner/Plugins/ag08_09.plugin/Contents/Info.plist

Version: 7.2.4

Path: /Library/Printers/Canon/IJScanner/Plugins/cncl09_09.plugin/Contents/Info.plist

Version: 3.7.1

Path: /Library/Printers/Canon/IJScanner/Plugins/cnq2413_09.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cnq2414_09.plugin/Contents/Info.plist

Version: 1.0.2

Path: /Library/Printers/Canon/IJScanner/Plugins/cnq4807_09.plugin/Contents/Info.plist

Version: 2.1.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cnq4808_09.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/cnq4809_09.plugin/Contents/Info.plist

Version: 1.0.2

Path: /Library/Printers/Canon/IJScanner/Plugins/cnq9601_09.plugin/Contents/Info.plist

Version: 2.0.0

Path: /Library/Printers/Canon/IJScanner/Plugins/ijfshlib_09.plugin/Contents/Info.plist

Version: 1.1.4

Path: /Library/Printers/Canon/IJScanner/Plugins/mld07_09.plugin/Contents/Info.plist

Version: 1.1.3

Path: /Library/Printers/Canon/IJScanner/Plugins/mld08_09.plugin/Contents/Info.plist

Version: 3.0.3

Path: /Library/Printers/Canon/IJScanner/Plugins/mld09_09.plugin/Contents/Info.plist

Version: 6.2.0

Path: /Library/Printers/Canon/IJScanner/Plugins/mld9601_09.plugin/Contents/Info.plist

Version: 3.1.3

Path: /Library/Printers/Canon/IJScanner/Plugins/sfusb_09.plugin/Contents/Info.plist

Version: 1.2.1

Path: /Library/Printers/Canon/IJScanner/Plugins/sgusb_09.plugin/Contents/Info.plist

Version: 1.4.0

Path: /Library/Printers/Canon/IJScanner/Plugins/smac_09.plugin/Contents/Info.plist

Version: 1.2.5

Path: /Library/Printers/Canon/IJScanner/Plugins/zoom_09.plugin/Contents/Info.plist

Version: 1.1.1

Image Capture Devices:

Path: /Library/Image Capture/Devices/Brother Scanner.app/Contents/Info.plist

Version: 2.3.1

Path: /Library/Image Capture/Devices/Brother Scanner.app/Contents/Resources/DeviceInfo.plist

Version: 2.3.1

Path: /Library/Image Capture/Devices/Brother Scanner.app/Contents/Resources/DeviceMatchingInfo.plist

Version: 2.3.1

Path: /Library/Image Capture/Devices/Canon IJScanner2.app/Contents/Info.plist

Version: 1.5.1

Path: /Library/Image Capture/Devices/Canon IJScanner2.app/Contents/Resources/DeviceInfo.plist

Version: 1.5.1

Path: /Library/Image Capture/Devices/Canon IJScanner2.app/Contents/Resources/DeviceMatchingInfo.plist

Version: 1.5.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Info.plist

Version: 5.3.15

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/.ICASingle.bundle/Contents/Info.plist

Version: 5.3.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/DDC.bundle/Contents/Info.plist

Version: 1.1.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/FIT.bundle/Contents/Info.plist

Version: 3.7.0

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/ImageFilter.bundle/Contents/Info.plist

Version: 3.2.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 1D.bundle/Contents/Info.plist

Version: 1.0

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 23.bundle/Contents/Info.plist

Version: 1.0

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 30.bundle/Contents/Info.plist

Version: 1.0.3

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 32.bundle/Contents/Info.plist

Version: 1.0.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 41.bundle/Contents/Info.plist

Version: 1.1.0

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 43.bundle/Contents/Info.plist

Version: 1.1.3

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 52.bundle/Contents/Info.plist

Version: 1.1.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 54.bundle/Contents/Info.plist

Version: 1.0.8

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 5A.bundle/Contents/Info.plist

Version: 1.0.3

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 66.bundle/Contents/Info.plist

Version: 1.0.9

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 68.bundle/Contents/Info.plist

Version: 1.1.2

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 6E.bundle/Contents/Info.plist

Version: 1.0.2

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 7A.bundle/Contents/Info.plist

Version: 1.0.5

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 7C.bundle/Contents/Info.plist

Version: 1.0.8

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 7E.bundle/Contents/Info.plist

Version: 1.0.2

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 86.bundle/Contents/Info.plist

Version: 1.0.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 8B.bundle/Contents/Info.plist

Version: 1.0.2

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 94.bundle/Contents/Info.plist

Version: 1.1.0

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter 95.bundle/Contents/Info.plist

Version: 1.1.1

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter A1.bundle/Contents/Info.plist

Version: 1.0.5

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/PlugIns/Interpreter AD.bundle/Contents/Info.plist

Version: 1.0.0

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/DeviceInfo.plist

Version: 5.3.15

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/DeviceMatchingInfo.plist

Version: 5.3.15

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/HardwareInfo.plist

Version: 5.3.15

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/ModelInfo.plist

Version: 5.3.15

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/ProfileInfo.plist

Version: 5.3.15

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/RegionCodeInfo.plist

Version: 5.3.15

Path: /Library/Image Capture/Devices/EPSON Scanner.app/Contents/Resources/ResolutionInfo.plist

Version: 5.3.15

Image Capture Support:

Extensions:

Path: /System/Library/Extensions/AppleMobileDevice.kext

Version: 3.3.0

Path: /System/Library/Extensions/AppleStorageDrivers.kext/Contents/PlugIns/AppleATAPIStorage.kext

Version: 3.3.1

Path: /System/Library/Extensions/AppleStorageDrivers.kext/Contents/PlugIns/AppleXserveRAID.kext

Version: 3.3.1

Path: /System/Library/Extensions/AppleStorageDrivers.kext/Contents/PlugIns/FireWireStorageDeviceSpecifics.kext

Version: 3.3.1

Path: /System/Library/Extensions/AppleStorageDrivers.kext/Contents/PlugIns/SonyXDCAMDriver.kext

Version: 3.3.1

Path: /System/Library/Extensions/AppleStorageDrivers.kext/Contents/PlugIns/USBStorageDeviceSpecifics.kext

Version: 3.3.1

Path: /System/Library/Extensions/AppleTopCase.kext

Version: 10.20

Path: /System/Library/Extensions/AppleUSBTopCase.kext

Version: 237.1

Path: /System/Library/Extensions/BJUSBLoad.kext

Version: 2.1.0

Path: /System/Library/Extensions/CellPhoneHelper.kext

Version: 1.2.6

Path: /System/Library/Extensions/IOHIDFamily.kext/Contents/PlugIns/IOHIDEventDriver.kext

Version: 1.8.1

Path: /System/Library/Extensions/IOHIDFamily.kext/Contents/PlugIns/IOHIDEventDriverSafeBoot.kext

Version: 1.8.1

Path: /System/Library/Extensions/IOHIDFamily.kext/Contents/PlugIns/IOHIDUserClient.kext

Version: 1.8.1

Path: /System/Library/Extensions/IOStreamFamily.kext/Contents/PlugIns/IOStreamUserClient.kext

Version: 1.1.0

Path: /System/Library/Extensions/IOUSBFamily.kext/Contents/PlugIns/IOUSBHIDDriverSafeBoot.kext

Version: 621.4.0

Path: /System/Library/Extensions/IOVideoFamily.kext/Contents/PlugIns/IOVideoDeviceUserClient.kext

Version: 1.2.0

Printers:

Brother MFC-9560CDW:

Status: Idle

Print Server: Local

Driver Version: 4.5.0

Default: Yes

Shared: No

URI: dnssd://Brother%20MFC-9560CDW._pdl-datastream._tcp.local./?bidi

PPD: Brother MFC-9560CDW CUPS

PPD File Version: 4.5.0

PostScript Version: (3010.106) 3

CUPS Version: 1.6.2 (cups-327.7)

Scanning support: Yes

Scanning app (bundleID path): -

Scanning app version: -

Scanner UUID: 79BCE8B2-79BC-E8B2-79BC-E8B279BCE8B2

Printer Commands: ReportLevels PrintSelfTestPage PJLBidirectional PJLWrite PJLRead

CUPS filters:

rastertobrother4150:

Path: /Library/Printers/Brother/Filter/rastertobrother4150.bundle/Contents/MacOS/rastertobrother4150

Permissions: rwxr-xr-x

Version: 4.1.1

commandtobrother:

Path: /Library/Printers/Brother/Filter/commandtobrother.bundle/Contents/MacOS/commandtobrother

Permissions: rwxr-xr-x

Version: 4.4.0

Fax support: No

Printer utility: /Library/Printers/Brother/Utilities/BrStatusMonitor.app

Printer utility version: 3.9.1

PDEs:

BRCLQuality.bundle:

Sandbox compliant: Yes

SATA/SATAExpress:

Intel 7 Series Chipset:

Vendor: Intel

Product: 7 Series Chipset

Link Speed: 6 Gigabit

Negotiated Link Speed: 6 Gigabit

Physical Interconnect: SATA

Description: AHCI Version 1.30 Supported

M4-CT512M4SSD1:

Capacity: 512.11 GB (512,110,190,592 bytes)

Model: M4-CT512M4SSD1

Revision: 000F

Native Command Queuing: Yes

Queue Depth: 32

Removable Media: No

Detachable Drive: No

BSD Name: disk0

Medium Type: Solid State

TRIM Support: No

Partition Map Type: GPT (GUID Partition Table)

S.M.A.R.T. status: Verified

Volumes:

disk0s1:

Capacity: 209.7 MB (209,715,200 bytes)

Content: EFI

disk0s2:

Capacity: 511.77 GB (511,766,216,704 bytes)

Available: 292.57 GB (292,567,236,608 bytes)

Writable: Yes

File System: Journaled HFS+

Content: Apple_HFS

Intel 7 Series Chipset:

Vendor: Intel

Product: 7 Series Chipset

Link Speed: 6 Gigabit

Negotiated Link Speed: 6 Gigabit

Physical Interconnect: SATA

Description: AHCI Version 1.30 Supported

ST3000DM001-9YN166:

Capacity: 3 TB (3,000,592,982,016 bytes)

Model: ST3000DM001-9YN166

Revision: CC4H

Native Command Queuing: Yes

Queue Depth: 32

Removable Media: No

Detachable Drive: No

BSD Name: disk1

Rotational Rate: 7200

Medium Type: Rotational

Partition Map Type: GPT (GUID Partition Table)

S.M.A.R.T. status: Verified

Volumes:

disk1s1:

Capacity: 209.7 MB (209,715,200 bytes)

Content: EFI

disk1s2:

Capacity: 3 TB (3,000,249,008,128 bytes)

Available: 909.19 GB (909,191,577,600 bytes)

Writable: Yes

File System: Journaled HFS+

Content: Apple_HFS

Software:

System Software Overview:

System Version: OS X 10.8.5 (12F45)

Kernel Version: Darwin 12.5.0

Time since boot: 25 minutes

Thunderbolt:

Thunderbolt: No hardware was found.

USB:

USB 3.0 SuperSpeed Bus:

Host Controller Location: Built-in USB

Host Controller Driver: AppleUSBXHCI

PCI Device ID: 0x1e31

PCI Revision ID: 0x0004

PCI Vendor ID: 0x8086

Bus Number: 0x0a

USB 3.0 Hi-Speed Bus:

Host Controller Location: Built-in USB

Host Controller Driver: AppleUSBXHCI

PCI Device ID: 0x1e31

PCI Revision ID: 0x0004

PCI Vendor ID: 0x8086

Bus Number: 0x0a

USB Hi-Speed Bus:

Host Controller Location: Built-in USB

Host Controller Driver: AppleUSBEHCI

PCI Device ID: 0x1e2d

PCI Revision ID: 0x0004

PCI Vendor ID: 0x8086

Bus Number: 0x1a

Hub:

Product ID: 0x0024

Vendor ID: 0x8087 (Intel Corporation)

Version: 0.00

Speed: Up to 480 Mb/sec

Location ID: 0x1a100000 / 2

Current Available (mA): 500

Current Required (mA): 0

USB 2.0 Hub [MTT]:

Product ID: 0x0201

Vendor ID: 0x1a40 (TERMINUS TECHNOLOGY INC.)

Version: 1.00

Speed: Up to 480 Mb/sec

Location ID: 0x1a120000 / 5

Current Available (mA): 500

Current Required (mA): 100

USB 2.0 Hub:

Product ID: 0x0101

Vendor ID: 0x1a40 (TERMINUS TECHNOLOGY INC.)

Version: 1.11

Speed: Up to 480 Mb/sec

Location ID: 0x1a127000 / 8

Current Available (mA): 500

Current Required (mA): 100

Fitbit Base Station:

Product ID: 0x84c4

Vendor ID: 0x10c4 (Silicon Laboratories, Inc.)

Version: 1.00

Serial Number: 01************************13

Speed: Up to 12 Mb/sec

Manufacturer: Silicon Labs

Location ID: 0x1a122000 / 7

Current Available (mA): 500

Current Required (mA): 156

Back-UPS RS 1500G FW:865.L3 .D USB FW:L3 :

Product ID: 0x0002

Vendor ID: 0x051d (American Power Conversion)

Version: 0.90

Serial Number: 3**********2

Speed: Up to 12 Mb/sec

Manufacturer: American Power Conversion

Location ID: 0x1a150000 / 4

Current Available (mA): 500

Current Required (mA): 2

Keyboard Hub:

Product ID: 0x1006

Vendor ID: 0x05ac (Apple Inc.)

Version: 96.15

Serial Number: 0

Speed: Up to 480 Mb/sec

Manufacturer: Apple, Inc.

Location ID: 0x1a110000 / 3

Current Available (mA): 500

Current Required (mA): 300

USB-PS/2 Optical Mouse:

Product ID: 0xc01e

Vendor ID: 0x046d (Logitech Inc.)

Version: 22.00

Speed: Up to 1.5 Mb/sec

Manufacturer: Logitech

Location ID: 0x1a111000 / 9

Current Available (mA): 100

Current Required (mA): 98

Apple Keyboard:

Product ID: 0x0220

Vendor ID: 0x05ac (Apple Inc.)

Version: 0.69

Speed: Up to 1.5 Mb/sec

Manufacturer: Apple, Inc

Location ID: 0x1a112000 / 6

Current Available (mA): 100

Current Required (mA): 20

USB Hi-Speed Bus:

Host Controller Location: Built-in USB

Host Controller Driver: AppleUSBEHCI

PCI Device ID: 0x1e26

PCI Revision ID: 0x0004

PCI Vendor ID: 0x8086

Bus Number: 0x1d

Hub:

Product ID: 0x0024

Vendor ID: 0x8087 (Intel Corporation)

Version: 0.00

Speed: Up to 480 Mb/sec

Location ID: 0x1d100000 / 2

Current Available (mA): 500

Current Required (mA): 0

Wi-Fi:

Software Versions:

CoreWLAN: 3.4 (340.18)

CoreWLANKit: 2.0.2 (202.11)

Menu Extra: 8.1 (810.11)

configd plug-in: 8.5 (850.252)

System Information: 8.3 (830.5)

IO80211 Family: 5.3 (530.5)

Diagnostics: 2.1 (210.25)

AirPort Utility: 6.3.1 (631.4)

Top
ACPI
Dev Props
DiskUtil
UIDs
Partitions
Loader Config
Mem Map
IOreg
Kernel dmesg
Kernel Info
Kexts
LPSCI
Misc
NVRAM
OpenCL
RTC
SMBIOS
SMC
Sys Prof